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* dm: tegra: pci: Convert tegra boards to driver model for PCISimon Glass2015-12-01-0/+5
* ARM: tegra: refactor common Kconfig optionsStephen Warren2015-12-01-18/+20
* x86: tsc: Move tsc_timer.c to drivers/timerBin Meng2015-12-01-390/+0
* x86: tsc: Remove legacy timer codesBin Meng2015-12-01-80/+0
* x86: Convert to use driver model timerBin Meng2015-12-01-39/+32
* x86: tsc: Add driver model timer supportBin Meng2015-12-01-0/+65
* x86: tsc: Use notrace from <linux/compiler.h>Bin Meng2015-12-01-3/+3
* x86: Remove MIN_PORT80_KCLOCKS_DELAYBin Meng2015-12-01-20/+0
* timer: sandbox: Use device tree to pass the clock frequencyBin Meng2015-12-01-0/+1
* Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2015-11-30-63/+406
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| * arm: at91/spl: atmel_sfr: move saic redirect to separate fileWenyou Yang2015-11-30-15/+25
| * arm: at91/spl: matrix: use matrix slave id macrosWenyou Yang2015-11-30-9/+34
| * arm: at91/spl: matrix: remove security peripheral select codeWenyou Yang2015-11-30-9/+0
| * arm: at91/spl: matrix: remove matrix write protection codeWenyou Yang2015-11-30-8/+0
| * arm: at91/spl: matrix: move matrix init to separate fileWenyou Yang2015-11-30-43/+52
| * arm: atmel: Add SAMA5D2 Xplained boardWenyou Yang2015-11-30-6/+274
| * gpio: atmel: Add the PIO4 driver supportWenyou Yang2015-11-30-0/+48
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-11-30-88/+783
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| * | armv8: fsl-layerscape: Fix early MMU table for nand bootYork Sun2015-11-30-0/+4
| * | armv8: ls2085a: Add workaround of errata A009635Prabhakar Kushwaha2015-11-30-0/+81
| * | armv8: fsl-layerscape: Fix "cpu release" commandYork Sun2015-11-30-0/+6
| * | armv8/layerscape: Update MMU table with execute-never bitsAlison Wang2015-11-30-31/+56
| * | drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3York Sun2015-11-30-0/+7
| * | armv8/ls1043ardb: add USB supportGong Qianyu2015-11-30-3/+3
| * | armv8/ls1043ardb: add DSPI supportGong Qianyu2015-11-30-0/+45
| * | armv8/ls1043aqds: dts: add dtb supportGong Qianyu2015-11-30-1/+126
| * | armv8/ls1043aqds: add LS1043AQDS board supportShaohui Xie2015-11-30-0/+10
| * | armv8/ls1043ardb: dts: add dtb supportGong Qianyu2015-11-30-0/+245
| * | armv8/fsl-layerscape: Remove reference to gdataGong Qianyu2015-11-30-2/+0
| * | pci/layerscape: add support for LS1043A PCIe LUT register accessMingkai Hu2015-11-30-0/+18
| * | armv8: ls2085a: Add support of LS2085A SoCPrabhakar Kushwaha2015-11-30-8/+23
| * | armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-30-48/+71
| * | driver: net: fsl-mc: Add DPAA2 commands to manage MCPrabhakar Kushwaha2015-11-30-0/+61
| * | armv8: lsch3: Fix lane protocol parsing logicPrabhakar Kushwaha2015-11-30-2/+23
| * | arm: ls1021a: Ensure Generic Timer disabled before jumping into the OSAlison Wang2015-11-30-0/+10
| * | arm: ls1021a: Ensure LS1021 ARM Generic Timer CompareValue Set 64-bitAlison Wang2015-11-30-2/+3
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* | Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-11-30-0/+62
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| * | arm: socfpga: dts: Adding drvsel and smplsel to dtsChin Liang See2015-11-30-0/+4
| * | arm: socfpga: Repair SoCrates boardMarek Vasut2015-11-30-0/+12
| * | ARM: socfpga: rename the cyclone5 and arria5 base address fileDinh Nguyen2015-11-30-0/+0
| * | ARM: socfpga: arria10: add base address map for Arria10Dinh Nguyen2015-11-30-0/+45
| * | arm: socfpga: reset: FIX address of tstscratch registerPhilipp Rosenberger2015-11-30-0/+1
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* | Merge git://www.denx.de/git/u-boot-ppc4xxTom Rini2015-11-30-24/+1
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| * | PPC4xx: Create "liebherr" vendor directoryWolfgang Denk2015-11-30-1/+1
| * | ppc4xx: Remove remnants from ocotea, taishan, ebony and taihuStefan Roese2015-11-30-23/+0
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* | Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini2015-11-30-2/+2
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| * | arm: s5pc1xx: move SoC to mach-s5pc1xxMinkyu Kang2015-11-30-2/+2
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* | arm: kirkwood: add ZyXEL NSA310S deviceGerald Kerma2015-11-29-0/+4
* | arm: mvebu: Configure ARP timeout and retry countStefan Roese2015-11-29-0/+2
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* am33xx: Remove serial_init in s_init for QSPI/NOR XIP bootVignesh R2015-11-23-6/+0
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