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* tegra: Add SDMMC support to funcmuxSimon Glass2012-02-12-0/+63
| | | | | | | | | This adds support for SDMMC ports to the funcmux. Only one option is supported: FUNCMUXO_SDMMC_8BIT which selects an 8-bit wide SDIO interface where available. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add I2C support to funcmuxSimon Glass2012-02-12-0/+40
| | | | | | | | Add support to funcmux for selecting I2C functions and programming the pinmux appropriately. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add enum to select from available funcmux configsSimon Glass2012-02-12-5/+6
| | | | | | | | | We want to give a name to each available funcmux config. For now we just use the pin group names (even through it is verbose) since there seems to be nothing better. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Adjust funcmux config test to permit expansionSimon Glass2012-02-12-25/+35
| | | | | | | | We want to support config options other than zero, so move the test to the end to allow intermediate code to OK such a config. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Fix default RAM size selection in odmdataStephen Warren2012-02-12-1/+1
| | | | | | | | | | | | | | | | | A value of 0 in the odmdata RAM size field means default, which is 512MB not 1GB. Fix this. For reference, see: http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=blob;\ f=arch/arm/mach-tegra/odm_kit/query/harmony/tegra_devkit_custopt.h;\ h=1ec7010911454f19a5018952fd245785a62c59ad;\ hb=0e52d7fe25b11a656c376a37890be219470661fb v2: New patch Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Fix conflicting pinmux for UARTAStephen Warren2012-02-12-0/+12
| | | | | | | | | | | | | | | Tegra appears to boot with function UARTA pre-selected on mux group SDB. If two mux groups are both set to the same function, it's unclear which group's pins drive the RX signals into the HW module. For UARTA, SDB certainly overrides group IRTX in practice. To solve this, configure some alternative function on SDB to avoid the conflict. Also, tri-state the group to avoid driving any signal onto it until we know what's connected. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: AM33XX: Add i2c supportPatil, Rachna2012-01-23-0/+5
| | | | | | | Add i2c driver board hookup for AM335X EVM Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Patil, Rachna <rachna@ti.com>
* omap_rev_string: output to stdoutAndreas Müller2012-01-16-14/+8
| | | | | | | | * avoid potential buffer overflows * allow SPL-build not to output "Texas Instruments Revision detection unimplemented" Signed-off-by: Andreas Müller <schnitzeltony@gmx.de> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP SPL: call timer_init in s_init to make udelay work earlierAndreas Müller2012-01-16-2/+2
| | | | Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
* ARM:AM33XX: Add SPL support for AM335X EVMChandan Nath2012-01-16-107/+119
| | | | | | | | | | | This patch is added to support SPL feature on AM335X platform. In this patch, MMC1 is configured as boot device for SPL and support for other devices will be added in the next patch series. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* ARM:AM33XX: Add mmc/sd supportChandan Nath2012-01-16-0/+12
| | | | | | | | | This patch add supports for mmc/sd driver on AM335X platform. PLL and pinmux configurations for mmc/sd are configured in this patch. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* ARM:AM33XX: Fix ddr and timer register offsetChandan Nath2012-01-16-4/+7
| | | | | | | | This patch is added to update incorrect ddr and timer register offset. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* omap3: make get_board_rev() function weakNikita Kiryanov2012-01-16-1/+2
| | | | | | | | | | Current get_board_rev() function returns a hard coded value which is obviously incorrect for the majority of boards. Allow boards to provide a correct implementation by making this function weak. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* omap4: fix boot issue on ES2.0 PandaAneesh V2012-01-16-2/+2
| | | | | | | | | | | | | Fix boot issue on ES2.0 Panda by tuning some IO settings. The CONTROL_EFUSE_2 register has to be over-ridden in software for 4430 boards. Commit 23e9f0723e48615332119de4f4ec7a833a282628 wrongly did this for CONTROL_EFUSE_1. Reverting this and doing it for CONTROL_EFUSE_2. Signed-off-by: Aneesh V <aneesh@ti.com> Tested-by: Raúl Porcel <armin76@gentoo.org>
* imx: mx6q: add aipstz init for off platform periphJason Liu2012-01-16-6/+23
| | | | | | | | | | | | Init peripheral access control register of AIPSTZ OPACRx: Buffer Writes(BW): 0 -> not bufferable, Supervisor Protect(SP): 0 -> not require supervisor privilege level for accesses. Write Protect(WP): 0 -> allows write accesses. Trusted Protect(TP): 0 -> allows unstrusted master Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Stefano Babic <sbabic@denx.de>
* mx28: fix clearing of IRQs in power initZach Sadecki2012-01-16-4/+4
| | | | | | | | | There are 2 locations in the power init code for the mx28 where IRQs are not being cleared because incorrect methods to clear those bits were being used. This was causing my board to get stuck waiting for POWER_CTRL_VDD5V_DROOP_IRQ to clear. Using the correct method to clear the IRQs fixes it. Signed-off-by: Zach Sadecki <zach@itwatchdogs.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Marek Vasut <marek.vasut@gmail.com>
* i.mx6:imx6q: allign MAC address with burned-in orderingJason Liu2012-01-16-6/+8
| | | | | | | | | | | | | | | | For the i.mx6q, the burned-in MAC address will be the following odering, fuse: 0x620[7:0] MAC_ADDR[7:0] ---> mac[5] fuse: 0x620[15:8] MAC_ADDR[15:8] ---> mac[4] fuse: 0x620[23:16] MAC_ADDR[23:16] ---> mac[3] fuse: 0x620[31:24] MAC_ADDR[31:24] ---> mac[2] fuse: 0x630[7:0] MAC_ADDR[39:32] ---> mac[1] fuse: 0x630[15:8] MAC_ADDR[47:40] ---> mac[0] This patch also fix the error caculation for the fuse bank[0] address Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Stefano Babic <sbabic@denx.de>
* mx28: Let dram_init be common for mx28Fabio Estevam2012-01-16-0/+21
| | | | | | | | Let dram_init function be a common function, so that other mx28 boards can reuse it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
* mx28: Let imx_get_mac_from_fuse be common for mx28Fabio Estevam2012-01-16-0/+46
| | | | | | | | | Let imx_get_mac_from_fuse function be a common function, so that other mx28 boards can reuse it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* net: imx: Add multi-FEC support for imx_get_mac_from_fuseFabio Estevam2012-01-16-4/+4
| | | | | | | | | | Add multi-FEC support for imx_get_mac_from_fuse by passing dev_id as a parameter. This feature is important on mx28 SoC for example that has two FEC ports. Cc: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx28: remove omap specific config optionsVeli-Pekka Peltola2012-01-16-6/+0
| | | | | | | | | | | Config options for OMAP are not used with i.MX28 so remove dead code. Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* i.mx: i.mx6q: Add the enet clock functionJason Liu2012-01-16-0/+5
| | | | | | Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Jason Liu <jason.hui@linaro.org> Acked-by: Stefano Babic <sbabic@denx.de>
* gpio: Replace ARM gpio.h with the common API in include/asm-genericJoe Hershberger2012-01-09-16/+19
| | | | | | | | | | | | | | | | ARM boards should use the generic GPIO API This means changing gpio to unsigned type Remove the unused gpio_toggle() function which is not part of the API Comment that free should not modify pin state Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> fixed merge conflict in da8xx_gpio.c, tegra2_gpio.c, and extended to the new mxs_gpio.c. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* tegra: Add support for UART init in cpu board.cSimon Glass2011-12-24-0/+51
| | | | | | | | | | We add a way of initialising the selected of UARTs prior to relocation. Boards can use the board_init_uart_f() instead of repeating this code themselves. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add a function mux featureSimon Glass2011-12-24-1/+59
| | | | | | | | | | | | funcmux permits selection of config options for particular peripherals, such as the pins that are used for that peripheral, if there are several options. Add UART selection to start with. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: add clock_ll_start_uart() to enable UART prior to relocSimon Glass2011-12-24-0/+14
| | | | | | | | | | Most boards will want to enable a UART early. This function provides that feature in Tegra architecture code so the code does not need to be copied on every board. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Move clock_early_init() to arch_cpu_init()Simon Glass2011-12-24-0/+3
| | | | | | | | | The clock init is not board specific, so move it into the cpu code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Move cpu_init_cp15() to arch_cpu_init()Simon Glass2011-12-24-0/+4
| | | | | | | | | This call is more of an architecture requirement than a board one, so move it there. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Always build with USE_PRIVATE_LIBGCC=yes.Thierry Reding2011-12-24-0/+2
| | | | | | | | | | The AVP on Tegra2 doesn't boot properly when U-Boot is linked against the GCC provided libgcc. To work around this, always build and link against a private libgcc for Tegra2-based boards. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* arm, davinci: Fix build warnings for cam_enc_4xxChristian Riesch2011-12-24-2/+3
| | | | | | | | | | | | This patch fixes a build warning for the cam_enc_4xx board introduced by commit d6ec0c0dfc70447cf615ae80a952da81f73f16b4: spl.c:35:13: warning: 'gdata' defined but not used spl.c:36:13: warning: 'bdata' defined but not used Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de>
* arm, davinci: Add SPL support for DA850 SoCsChristian Riesch2011-12-24-2/+35
| | | | | | | | | | This code adds an SPL for booting from SPI flash on DA850 SoCs. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Tom Rini <trini@ti.com>
* arm: Tegra: fix undefined instruction hang immediately after resetTom Warren2011-12-21-0/+2
| | | | | | | | | | | commit 0d479b53 (Aneesh V) added code for OMAP4 that doesn't execute on Tegra, due to the AVP (ARM7TDI) not having a CP15. Result was an undefined instruction hang just after reset. Signed-off-by: Tom Warren <twarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Acked-by: Aneesh V <aneesh@ti.com>
* add print_cpuinfo to s3c24x0David Müller (ELSOFT AG)2011-12-19-0/+55
| | | | | | | | | | | | Hello This patch adds support for "print_cpuinfo" on Samsung s3c24x0 based targets. If activated by "#define CONFIG_DISPLAY_CPUINFO", the chip ID and the 3 main cpu frequencies will be displayed. Dave Signed-off-by: David Müller <d.mueller@elsoft.ch>
* davinci: Fixed wrong timebase clock frequency.Manfred Rudigier2011-12-19-1/+1
| | | | Signed-off-by: Manfred Rudigier <manfred.rudigier@omicron.at>
* arm926ejs: remove noop flush_dcache_all functionIlya Yanok2011-12-19-5/+0
| | | | | | | | | | | | | | | | Commit 2f3427c added noop cache functions implementation for arm926ejs to fix compilation of drivers depending on these functions (DaVinci EMAC in particular). Unfortunately, the bug was introduced: noop implementation calls dcache_disable which calls flush_dcache_all which in turn calls dcache_disable thus creating an infinite loop. This patch removes noop implementation for flush_dcache_all, we already have default one in arch/arm/lib/cache.c and it should be used instead. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Tested-by: Matthias Weisser <weisserm@arcor.de>
* USB: MX5: add helper functions to enable USB clocksWolfgang Grandegger2011-12-11-0/+72
| | | | | | | | | | Signed-off-by: Wolfgang Grandegger <wg@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Remy Bohmer <linux@bohmer.net> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Jason Liu <r64343@freescale.com> V2: Fix spacing in crm_regs.h
* pxa: activate the first usb host port on pxa27x by defaultStefan Herbrechtsmeier2011-12-11-2/+2
| | | | | | | | The pxa27x has 3 usb host ports. Activate all by default. Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Remy Bohmer <linux@bohmer.net>
* pxa: fix usb host register mismatchStefan Herbrechtsmeier2011-12-11-1/+1
| | | | | | Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Remy Bohmer <linux@bohmer.net>
* arm, davinci: Use lldiv for the 64-bit divisions in timer.cChristian Riesch2011-12-10-2/+4
| | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* M28: Cleanup memsize.o OOT buildMarek Vasut2011-12-09-23/+9
| | | | | | | | | | | | | | | | The current way memsize.c is built just made a symlink into the directory with SPL and then compiled it like any other file there. This was bad as that broke the out-of-tree build. The new way introduced in this patch uses the standard spl/Makefile methods (CONFIG_SPL_LIBCOMMON_SUPPORT / CONFIG_SPL_LIBGENERIC_SUPPORT) to let files in common/ be built. Because common/Makefile says memsize.c is always built (SPL and non-SPL build), this fixes our issue with memsize.c out-of-tree build. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* i.MX28: Move SPL to arch/arm/cpu/arm926ejs/mx28Marek Vasut2011-12-09-0/+1611
| | | | | | | | | | This moves SPL to common location so it can be reused by multiple boards. Also, this commit adjusts M28 SoM to avoid breakage due to the move. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* i.mx: add the initial support for freescale i.MX6Q processorJason Liu2011-12-09-0/+591
| | | | | | | | i.MX6Q is freescale quad core processors with ARM cortex_a9 complex. This patch is to add the initial support for this processor. Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc:Stefano Babic <sbabic@denx.de>
* i.mx: introduce the armv7/imx-common folderJason Liu2011-12-09-86/+165
| | | | | | | | | | | | | | | | | In order to support the coming MX6 platform and to reducde the duplicated code, we had better move some common files or functions to the imx-common folder for sharing. This patch does the following: - move speed.c file from armv7/mx5/speed.c to armv7/imx-common/speed.c - move armv7/mx5/timer.c to armv7/imx-common/timer.c, no any new feature added but just fix the checkpatch errors in the old file and remove the CONFIG_SYS_MX5_CLK32 reference in the file - create one new file cpu.c file to store the common function with i.mx5/6 Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc:Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* S5PC2XX: Rename S5pc2XX to exynosChander Kashyap2011-12-09-25/+25
| | | | | | | | | | | | | | As per new naming convention for Samsung SoC's, all Cortex-A9 and Cortex-A15 based SoC's will be classified under the name Exynos. Cortex-A9 and Cortex-A15 based SoC's will be sub-classified as Exynos4 and Exynos5 respectively. In order to better adapt and reuse code across various upcoming Samsung Exynos based boards, all uses of s5pc210 prefix/suffix/directory-names are renamed in this patch. s5pc210 is renamed as exynos4210 and S5PC210/s5pc210 suffix/prefix are renamed as exynos4/EXYNOS4. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* tegra2: Don't use board pointer before it is set upSimon Glass2011-12-09-9/+1
| | | | | | | | | | In board_init_f() the gd->bd pointer is not valid when dram_init() is called. This only avoids dying because DRAM is at zero on Tegra2. The common ARM routine sets up the banks in the same way anyway, so we can just remove this code. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Remove unneeded 'dynamic ram size' messageSimon Glass2011-12-09-3/+1
| | | | | | | | | | | | | | | | | | | | | | | This message is not required, since it is followed by an 'official' U-Boot message. U-Boot 2011.03-00048-gd7cb0d3 (May 11 2011 - 17:17:23) TEGRA2 Board: NVIDIA Seaboard dynamic ram_size = 1073741824 DRAM: 1 GiB becomes: TEGRA2 Board: NVIDIA Seaboard DRAM: 1 GiB This is a separate commit since it changes behavior. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Remove unneeded boot codeSimon Glass2011-12-09-147/+1
| | | | | | | | Since we have cache support built in we can remove Tegra's existing cache initialization code amd other related dead code. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* arm: Move CP15 init out of cpu_init_crit()Simon Glass2011-12-09-6/+18
| | | | | | | | | | | | | | | | | | | | Some SOCs have do not start up with their 'main' CPU. The first U-Boot code may then be executed with a CPU which does not have a CP15, or not a useful one. Here we split the initialization of CP15 into a separate call, which can be performed later if required. Once the main CPU is running, you should call cpu_init_cp15() to perform this init as early as possible. Existing ARMv7 boards which define CONFIG_SKIP_LOWLEVEL_INIT should not need to change, this CP15 init is still skipped in that case. The only impact for these boards is that the cpu_init_cp15() will be available even if it is never used on these boards. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Simplify tegra_start() boot pathSimon Glass2011-12-09-25/+37
| | | | | | | | | | | | | | | | | The Tegra2 boot path is more complicated than it needs to be. Since we want to move to building most of U-Boot with ARMv7 and only a small part with ARMv4T (for AVP) it should be as simple as possible. This makes tegra2_start() into a simple function which either does AVP init or A9 init depending on which core is running it. Both cores now following the same init path, beginning at _start, and the special Tegra2 boot path code is no longer required. Only two files need to be built for ARMv4T, and this is handled in the Tegra2 CPU Makefile. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add arch_cpu_init() to fire up Cortex-A9Simon Glass2011-12-09-0/+21
| | | | | | | | | | | | | We want to move away from a special Tegra2 start-up, and just use arch_cpu_init() instead. However, if we run board_init_f() from boot we need to build it for ARMv4T, since the Tegra's AVP start-up CPU does not support ARMv7. The effect of this is to do the AVP init earlier, and in arch_cpu_init(), rather that board_early_init_f(). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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