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author | Simon Glass <sjg@chromium.org> | 2011-11-28 15:04:37 +0000 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-12-24 10:23:32 +0100 |
commit | 8442fd3c6a82def9beac46ab683f2fd4bf8f8f14 (patch) | |
tree | 0f972b7244ae9980f4924f91e356f72e2b71103d /arch/arm/cpu | |
parent | 905ed41aad2f80b64b1163a55e18ee4e5278e708 (diff) | |
download | u-boot-imx-8442fd3c6a82def9beac46ab683f2fd4bf8f8f14.zip u-boot-imx-8442fd3c6a82def9beac46ab683f2fd4bf8f8f14.tar.gz u-boot-imx-8442fd3c6a82def9beac46ab683f2fd4bf8f8f14.tar.bz2 |
tegra: add clock_ll_start_uart() to enable UART prior to reloc
Most boards will want to enable a UART early. This function provides
that feature in Tegra architecture code so the code does not need to be
copied on every board.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r-- | arch/arm/cpu/armv7/tegra2/clock.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/tegra2/clock.c b/arch/arm/cpu/armv7/tegra2/clock.c index 03ac1e3..11d2346 100644 --- a/arch/arm/cpu/armv7/tegra2/clock.c +++ b/arch/arm/cpu/armv7/tegra2/clock.c @@ -904,6 +904,20 @@ static int clock_set_rate(enum clock_id clkid, u32 n, u32 m, u32 p, u32 cpcon) return 0; } +void clock_ll_start_uart(enum periph_id periph_id) +{ + /* Assert UART reset and enable clock */ + reset_set_enable(periph_id, 1); + clock_enable(periph_id); + clock_ll_set_source(periph_id, 0); /* UARTx_CLK_SRC = 00, PLLP_OUT0 */ + + /* wait for 2us */ + udelay(2); + + /* De-assert reset to UART */ + reset_set_enable(periph_id, 0); +} + int clock_verify(void) { struct clk_pll *pll = get_pll(CLOCK_ID_PERIPH); |