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* powerpc/85xx: Fix PCI memory map setup on P1_P2_RDBPrabhakar Kushwaha2011-03-24-2/+2
* ppc/85xx: Fix compile err when PCI disabled on P1_P2_RDBPrabhakar Kushwaha2011-01-19-2/+6
* powerpc/85xx: Move RESET_VECTOR_ADDRESS into config.hKumar Gala2011-01-19-13/+1
* powerpc/85xx: Rework P1_P2_RDB pci_init_board to use common FSL PCIe codeKumar Gala2011-01-14-62/+2
* mpc85xx boards: initdram() cleanup/bugfixBecky Bruce2011-01-14-14/+1
* powerpc/85xx: Cleanup SGMII detection and reportingKumar Gala2011-01-14-7/+4
* powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configuredKumar Gala2011-01-14-6/+4
* Switch from archive libraries to partial linkingSebastien Carlier2010-11-17-2/+2
* mpc85xx: Fix SERDES/eTSEC message indentationPeter Tyser2010-11-14-1/+1
* fsl: Clean up printing of PCI boot infoPeter Tyser2010-11-14-8/+8
* p1_p2_rdb: to set SQW/INT pin of RTC as INT linePriyanka Jain2010-11-12-1/+3
* Makefile: move all Power Architecture boards into boards.cfgWolfgang Denk2010-10-18-7/+0
* Rename TEXT_BASE into CONFIG_SYS_TEXT_BASEWolfgang Denk2010-10-18-5/+5
* mkconfig: change CONFIG_MK_ prefix into plain CONFIG_Wolfgang Denk2010-10-18-3/+3
* powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliasesKumar Gala2010-07-20-13/+2
* 85xx/p1_p2_rdb: Added RevD board version supportPoonam Aggrwal2010-06-29-3/+13
* 85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHzPoonam Aggrwal2010-06-29-1/+1
* ppc/85xx: Fixup PCI nodes for P1_P2_RDBKumar Gala2010-04-26-0/+4
* Create CPUDIR variablePeter Tyser2010-04-13-1/+1
* PCIe, USB: Replace 'end point' references with 'endpoint'Peter Tyser2010-01-17-2/+2
* ppc/85xx: Map boot page guarded for MP bootKumar Gala2010-01-05-1/+1
* ppc/85xx: Make flash TLB entry determined at runtime on FSL boardsKumar Gala2010-01-05-1/+1
* ppc/85xx: Move to using fsl_setup_hose on P1/P2 RDBKumar Gala2010-01-05-6/+4
* Revert "ppc/85xx/pci: fsl_pci_init: pcie agent mode support"Kumar Gala2009-11-04-2/+2
* ppc/85xx/pci: fsl_pci_init: pcie agent mode supportVivek Mahajan2009-10-27-2/+2
* 85xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data ratePoonam Aggrwal2009-10-27-2/+2
* 85xx/p1_p2rdb: Fix crash while configuring 32 bit DDR i/f for P1020RDB.Poonam Aggrwal2009-10-27-8/+8
* ppc/P1_P2_RDB: On-chip BootROM supportDipen Dudhat2009-10-16-0/+12
* ppc/P1_P2_RDB: NAND Boot SupportDipen Dudhat2009-10-16-0/+17
* ppc/85xx: 32bit DDR changes for P1020/P1011Poonam Aggrwal2009-09-24-5/+24
* ppc/85xx: Clean up use of LAWAR definesKumar Gala2009-09-24-2/+2
* ppc/85xx: Clean up p1_p2_rdb PCI setupKumar Gala2009-09-24-20/+22
* ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link addressKumar Gala2009-09-09-0/+2
* ppc/8xxx: Refactor code to determine if PCI is enabled & agent/hostKumar Gala2009-09-08-6/+4
* ppc/8xxx: Remove ddr_pd_cntl register since it doesn't existKumar Gala2009-09-08-5/+0
* 85xx: Added PCIe support for P1 P2 RDBPoonam Aggrwal2009-08-28-1/+119
* 85xx: Move to a common linker scriptKumar Gala2009-08-28-143/+0
* 85xx: Add support for P2020RDB boardPoonam Aggrwal2009-08-28-0/+809
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