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* Create CPUDIR variablePeter Tyser2010-04-13-1/+1
* PCIe, USB: Replace 'end point' references with 'endpoint'Peter Tyser2010-01-17-2/+2
* ppc/85xx: Map boot page guarded for MP bootKumar Gala2010-01-05-1/+1
* ppc/85xx: Make flash TLB entry determined at runtime on FSL boardsKumar Gala2010-01-05-1/+1
* ppc/85xx: Move to using fsl_setup_hose on P1/P2 RDBKumar Gala2010-01-05-6/+4
* Revert "ppc/85xx/pci: fsl_pci_init: pcie agent mode support"Kumar Gala2009-11-04-2/+2
* ppc/85xx/pci: fsl_pci_init: pcie agent mode supportVivek Mahajan2009-10-27-2/+2
* 85xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data ratePoonam Aggrwal2009-10-27-2/+2
* 85xx/p1_p2rdb: Fix crash while configuring 32 bit DDR i/f for P1020RDB.Poonam Aggrwal2009-10-27-8/+8
* ppc/P1_P2_RDB: On-chip BootROM supportDipen Dudhat2009-10-16-0/+12
* ppc/P1_P2_RDB: NAND Boot SupportDipen Dudhat2009-10-16-0/+17
* ppc/85xx: 32bit DDR changes for P1020/P1011Poonam Aggrwal2009-09-24-5/+24
* ppc/85xx: Clean up use of LAWAR definesKumar Gala2009-09-24-2/+2
* ppc/85xx: Clean up p1_p2_rdb PCI setupKumar Gala2009-09-24-20/+22
* ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link addressKumar Gala2009-09-09-0/+2
* ppc/8xxx: Refactor code to determine if PCI is enabled & agent/hostKumar Gala2009-09-08-6/+4
* ppc/8xxx: Remove ddr_pd_cntl register since it doesn't existKumar Gala2009-09-08-5/+0
* 85xx: Added PCIe support for P1 P2 RDBPoonam Aggrwal2009-08-28-1/+119
* 85xx: Move to a common linker scriptKumar Gala2009-08-28-143/+0
* 85xx: Add support for P2020RDB boardPoonam Aggrwal2009-08-28-0/+809
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