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* x86: Implement functions for writing coreboot tableBin Meng2016-03-17-0/+147
* x86: Support writing configuration tables in high areaBin Meng2016-03-17-0/+11
* x86: Simplify codes in write_tables()Bin Meng2016-03-17-27/+34
* x86: Change write_acpi_tables() signature a little bitBin Meng2016-03-17-6/+5
* x86: Use a macro for ROM table alignmentBin Meng2016-03-17-5/+7
* x86: Change to use start/end address pair in write_tables()Bin Meng2016-03-17-6/+12
* x86: Clean up coreboot_tables.hBin Meng2016-03-17-73/+80
* x86: Move sysinfo related to sysinfo.hBin Meng2016-03-17-4/+2
* x86: Move asm/arch-coreboot/tables.h to a common placeBin Meng2016-03-17-3/+1
* dm: Use uclass_first_device_err() where it is usefulSimon Glass2016-03-14-20/+12
* x86: Add Intel Cougar Canyon 2 boardBin Meng2016-02-21-0/+109
* x86: ivybridge: bd82x6x: Support FSP enabled configurationBin Meng2016-02-21-1/+5
* x86: fsp: Make sure HOB list is not overwritten by U-BootBin Meng2016-02-21-0/+43
* x86: ivybridge: Add FSP supportBin Meng2016-02-21-0/+131
* x86: fix memalign() parameter orderStephen Warren2016-02-21-1/+1
* Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingTom Rini2016-02-08-2/+2
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| * Use correct spelling of "U-Boot"Bin Meng2016-02-06-2/+2
* | x86: Drop pci_type1.c and DEFINE_PCI_DEVICE_TABLEBin Meng2016-02-05-60/+0
* | x86: Disable DM_PCI_COMPATBin Meng2016-02-05-3/+0
* | x86: quark: Use Quark's own PCI config APIsBin Meng2016-02-05-2/+3
* | x86: pci: Drop legacy PCI APIsBin Meng2016-02-05-65/+0
* | x86: pci: Use DM PCI APIs in pci_assign_irqs()Bin Meng2016-02-05-3/+3
* | x86: qemu: Convert to use DM PCI APIBin Meng2016-02-05-17/+17
* | x86: tnc: Remove IGD and SDVO devices from driver modelBin Meng2016-02-05-0/+36
* | x86: tnc: Use DM PCI API in disable_igd()Bin Meng2016-02-05-3/+19
* | x86: tnc: Change disable_igd() to have a return valueBin Meng2016-02-05-3/+7
* | x86: irq: Convert to use DM PCI APIBin Meng2016-02-05-4/+4
* | x86: irq: Move irq_router to a per driver privBin Meng2016-02-05-46/+51
* | x86: irq: Get irq_router's bdf via dm_pci_get_bdf()Bin Meng2016-02-05-8/+1
* | x86: minnowmax: Drop io-base property in the pch_pinctrl nodeBin Meng2016-02-05-1/+0
* | x86: Drop asm/arch/gpio.hBin Meng2016-02-05-89/+0
* | x86: ich6_gpio: Convert to use proper DM APIBin Meng2016-02-05-153/+163
* | x86: pch: Implement get_gpio_base opBin Meng2016-02-05-0/+33
* | dm: pch: Rename get_sbase op to get_spi_baseBin Meng2016-02-05-2/+2
* | dm: pch: Remove pch_get_version opBin Meng2016-02-05-6/+0
* | x86: quark: Drop unprotect_spi_flash()Bin Meng2016-02-05-17/+0
* | x86: tnc: Drop unprotect_spi_flash()Bin Meng2016-02-05-16/+0
* | spi: ich: Use compatible strings to distinguish controller versionBin Meng2016-02-05-7/+7
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* x86: Correct spi node aliasBin Meng2016-01-28-14/+14
* x86: config option for loading ACPI table from QEMUMiao Yan2016-01-28-0/+9
* x86: qemu: add the ability to load and link ACPI tables from QEMUMiao Yan2016-01-28-0/+322
* x86: qemu: setup PM IO base for ACPI in southbridgeMiao Yan2016-01-28-0/+43
* x86: qemu: re-structure qemu_fwcfg_list_firmware()Miao Yan2016-01-28-17/+55
* x86: baytrail: Add option to disable the internal UART to setup_early_uart()Stefan Roese2016-01-28-5/+9
* x86: ivybridge: Use syscon for the GMA deviceSimon Glass2016-01-24-15/+17
* x86: Set up a shared syscon numbering schemaSimon Glass2016-01-24-4/+14
* x86: ivybridge: Drop the SMM-locking codeSimon Glass2016-01-24-57/+0
* x86: ivybridge: Drop XHCI supportSimon Glass2016-01-24-34/+0
* x86: ivybridge: Drop special EHCI initSimon Glass2016-01-24-34/+12
* x86: ivybridge: Sort out the calls to bridge_silicon_revision()Simon Glass2016-01-24-42/+46
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