summaryrefslogtreecommitdiff
path: root/arch/x86
diff options
context:
space:
mode:
authorBin Meng <bmeng.cn@gmail.com>2016-01-27 00:56:34 -0800
committerBin Meng <bmeng.cn@gmail.com>2016-01-28 13:53:30 +0800
commit81aaa3d9fce5ce9641e5f0c3354da876d859b3b6 (patch)
tree410ef19c0021dd425a6955c6bf2ca85ab077ea77 /arch/x86
parenta5dd1e6726c1bc249eaf230bad3eb14764a71998 (diff)
downloadu-boot-imx-81aaa3d9fce5ce9641e5f0c3354da876d859b3b6.zip
u-boot-imx-81aaa3d9fce5ce9641e5f0c3354da876d859b3b6.tar.gz
u-boot-imx-81aaa3d9fce5ce9641e5f0c3354da876d859b3b6.tar.bz2
x86: Correct spi node alias
With recent changes spi node was moved to a place as a subnode under pch, so update the alias to refer to its correct place as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/dts/bayleybay.dts4
-rw-r--r--arch/x86/dts/broadwell_som-6896.dts4
-rw-r--r--arch/x86/dts/chromebook_link.dts4
-rw-r--r--arch/x86/dts/chromebox_panther.dts4
-rw-r--r--arch/x86/dts/crownbay.dts4
-rw-r--r--arch/x86/dts/galileo.dts4
-rw-r--r--arch/x86/dts/minnowmax.dts4
7 files changed, 14 insertions, 14 deletions
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index 9bf707b..fbca467 100644
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -21,7 +21,7 @@
aliases {
serial0 = &serial;
- spi0 = "/spi";
+ spi0 = &spi;
};
config {
@@ -184,7 +184,7 @@
>;
};
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";
diff --git a/arch/x86/dts/broadwell_som-6896.dts b/arch/x86/dts/broadwell_som-6896.dts
index 4e9e410..7b2c515 100644
--- a/arch/x86/dts/broadwell_som-6896.dts
+++ b/arch/x86/dts/broadwell_som-6896.dts
@@ -10,7 +10,7 @@
compatible = "advantech,som-6896", "intel,broadwell";
aliases {
- spi0 = "/spi";
+ spi0 = &spi;
};
config {
@@ -34,7 +34,7 @@
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch9";
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index d148d6e..5807203 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -11,7 +11,7 @@
compatible = "google,link", "intel,celeron-ivybridge";
aliases {
- spi0 = "/pci/pch/spi";
+ spi0 = &spi;
usb0 = &usb_0;
usb1 = &usb_1;
};
@@ -252,7 +252,7 @@
/* Enable EC SMI source */
intel,alt-gp-smi-enable = <0x0100>;
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";
diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts
index 2302701..48f0c77 100644
--- a/arch/x86/dts/chromebox_panther.dts
+++ b/arch/x86/dts/chromebox_panther.dts
@@ -10,7 +10,7 @@
compatible = "google,panther", "intel,haswell";
aliases {
- spi0 = "/spi";
+ spi0 = &spi;
};
config {
@@ -56,7 +56,7 @@
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch9";
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index d6dd0b4..47fab0f 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -19,7 +19,7 @@
compatible = "intel,crownbay", "intel,queensbay";
aliases {
- spi0 = "/spi";
+ spi0 = &spi;
};
config {
@@ -227,7 +227,7 @@
>;
};
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index a2f5a1f..dd75fc4 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -18,7 +18,7 @@
compatible = "intel,galileo", "intel,quark";
aliases {
- spi0 = "/spi";
+ spi0 = &spi;
};
config {
@@ -115,7 +115,7 @@
>;
};
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index e7ef7c9..7afdf6c 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -20,7 +20,7 @@
aliases {
serial0 = &serial;
- spi0 = "/spi";
+ spi0 = &spi;
};
config {
@@ -218,7 +218,7 @@
>;
};
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";