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* x86: qemu: Turn on PCIe ECAM address range decoding on Q35Bin Meng2015-07-28-0/+4
* x86: qemu: Enable I/O APIC chip select on PIIX3Bin Meng2015-07-28-1/+5
* x86: mpspec: Allow platform to determine how PIRQ is connected to I/O APICBin Meng2015-07-28-0/+17
* x86: pci: Assign pci irqs to all functionsBin Meng2015-07-28-2/+1
* x86: Change pci option rom area MTRR setting to cacheableBin Meng2015-07-28-0/+2
* x86: Display correct CS/EIP/EFLAGS when there is an error codeBin Meng2015-07-28-3/+37
* x86: delete unneeded declarations of disable_irq() and enable_irq()Masahiro Yamada2015-07-22-4/+0
* x86: Configure VESA parameters before loading Linux kernelBin Meng2015-07-14-0/+1
* x86: Setup fixed range MTRRs for legacy regionsBin Meng2015-07-14-11/+16
* x86: Generate a valid MultiProcessor (MP) tableBin Meng2015-07-14-0/+10
* x86: Add MultiProcessor (MP) table APIsBin Meng2015-07-14-0/+448
* x86: Remove inline for lapic access routinesBin Meng2015-07-14-124/+10
* x86: Add I/O APIC register access routinesBin Meng2015-07-14-0/+24
* x86: Clean up ioapic header fileBin Meng2015-07-14-23/+3
* x86: Clean up lapic codesBin Meng2015-07-14-161/+85
* x86: Move MP initialization codes into a common placeBin Meng2015-07-14-1/+0
* x86: dm: Clean up cpu driversBin Meng2015-07-14-14/+34
* x86: fsp: Move FspInitEntry call to board_init_f()Bin Meng2015-07-14-0/+3
* x86: fsp: Load GDT before calling FspInitEntryBin Meng2015-07-14-0/+7
* x86: gpio: add pinctrl support from the device treeGabriel Huau2015-06-04-0/+1
* x86: coreboot: Fix cosmetic issuesBin Meng2015-06-04-1/+0
* x86: qemu: Adjust VGA initializationBin Meng2015-06-04-0/+2
* x86: qemu: Enable legacy IDE I/O ports decodeBin Meng2015-06-04-0/+24
* x86: qemu: Turn on legacy segments decodeBin Meng2015-06-04-0/+6
* x86: quark: Implement PIRQ routingBin Meng2015-06-04-15/+70
* x86: Refactor PIRQ routing supportBin Meng2015-06-04-55/+76
* x86: Support QEMU x86 targetsBin Meng2015-06-04-0/+30
* x86: Add a CPU driver for baytrailSimon Glass2015-04-30-6/+21
* x86: Allow CPUs to be set up after relocationSimon Glass2015-04-30-0/+16
* x86: Add functions to set and clear bits on MSRsSimon Glass2015-04-30-0/+28
* x86: Add multi-processor initSimon Glass2015-04-30-5/+187
* x86: Provide access to the IDTSimon Glass2015-04-29-0/+2
* x86: Store the GDT pointer in global_dataSimon Glass2015-04-29-0/+1
* x86: Add an mfence macroSimon Glass2015-04-29-0/+5
* x86: Add defines for fixed MTRRsSimon Glass2015-04-29-0/+14
* x86: Add atomic operationsSimon Glass2015-04-29-0/+115
* x86: Add support for the Simple Firmware Interface (SFI)Simon Glass2015-04-29-0/+137
* x86: Implement reset_cpu() correctly for modern CPUsSimon Glass2015-04-29-0/+19
* x86: quark: Turn on legacy segments decodeBin Meng2015-04-29-0/+7
* x86: baytrail: fix the GPIOBASE addressGabriel Huau2015-04-29-1/+1
* x86: queensbay: Implement PIRQ routingBin Meng2015-04-29-2/+188
* x86: Support platform PIRQ routingBin Meng2015-04-29-0/+139
* x86: Write configuration tables in last_stage_init()Bin Meng2015-04-29-0/+49
* x86: Add a function to assign IRQ numbers to PCI deviceBin Meng2015-04-29-0/+14
* x86: Clean up arch/x86/include/asm/e820.hBin Meng2015-04-29-131/+2
* x86: Set serial port IRQ for SMSC LPC47MBin Meng2015-04-29-0/+3
* x86: queensbay: Avoid using PCH prefixBin Meng2015-04-29-2/+1
* dm: x86: spi: Convert ICH SPI driver to driver modelSimon Glass2015-04-18-2/+2
* dm: x86: pci: Convert chromebook_link to use driver model for pciSimon Glass2015-04-18-1/+0
* dm: x86: pci: Add a PCI driver for driver modelSimon Glass2015-04-18-0/+8
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