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authorBin Meng <bmeng.cn@gmail.com>2015-07-15 16:23:38 +0800
committerSimon Glass <sjg@chromium.org>2015-07-28 10:36:22 -0600
commit8ba25eec868aa40a42360397ec57f74fcaec3103 (patch)
tree8527028fdb7090228acf5d252d18e9346b0e80ba /arch/x86/include/asm
parent3ccd49cab40603c41dd7d1ada0b971d59b93940d (diff)
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x86: Change pci option rom area MTRR setting to cacheable
Turn on cache on the pci option rom area to improve the performance. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm')
-rw-r--r--arch/x86/include/asm/mtrr.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index 70762ee..f9b30f6 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -55,6 +55,8 @@
#define MTRR_FIX_4K_F0000_MSR 0x26e
#define MTRR_FIX_4K_F8000_MSR 0x26f
+#define MTRR_FIX_TYPE(t) ((t << 24) | (t << 16) | (t << 8) | t)
+
#if !defined(__ASSEMBLER__)
/**