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* x86: minnowmax: Define and enable interrupt setupSimon Glass2015-08-14-3/+66
* x86: baytrail: Configure FSP UPD from device treeAndrew Bradford2015-08-14-0/+94
* x86: dts: Add a device tree file for EFISimon Glass2015-08-05-0/+23
* x86: bayleybay: Configure PCI IRQBin Meng2015-08-05-0/+63
* x86: Add Intel Bayley Bay board supportBin Meng2015-08-05-1/+136
* x86: Add microcode for BayTrail-I B0 steppingBin Meng2015-08-05-0/+4244
* x86: qemu: Add MP initializationBin Meng2015-08-05-0/+14
* x86: qemu: Enable writing MP tableBin Meng2015-07-28-0/+24
* x86: Convert to use driver model pci on queensbay/crownbayBin Meng2015-07-28-1/+5
* x86: Enable DM RTC support for all x86 boardsBin Meng2015-07-28-0/+7
* dm: x86: minnowmax: Move PCI to use driver modelSimon Glass2015-07-14-0/+10
* x86: queensbay: Change PCIe root ports' interrupt routingBin Meng2015-07-14-4/+16
* x86: queensbay: Correct Topcliff device irqsBin Meng2015-07-14-12/+12
* x86: crownbay: Enable DM RTC supportBin Meng2015-07-14-0/+7
* x86: crownbay: Add MP initializationBin Meng2015-07-14-0/+20
* x86: gpio: add pinctrl support from the device treeGabriel Huau2015-06-04-0/+23
* x86: qemu: Implement PIRQ routingBin Meng2015-06-04-0/+48
* x86: coreboot: Control I/O port 0xb2 writing via device treeBin Meng2015-06-04-0/+1
* x86: qemu: Create separate i440fx and q35 device treesBin Meng2015-06-04-2/+37
* x86: quark: Implement PIRQ routingBin Meng2015-06-04-0/+22
* x86: Refactor PIRQ routing supportBin Meng2015-06-04-0/+54
* x86: Support QEMU x86 targetsBin Meng2015-06-04-1/+36
* x86: Enable multi-core init for Minnowboard MAXSimon Glass2015-04-30-0/+20
* x86: link: Add PCH driver to support SPI FlashSimon Glass2015-04-29-1/+1
* x86: minnowmax: use the correct NOR in the configurationGabriel Huau2015-04-29-1/+1
* x86: minnowmax: add GPIO banks in the device treeGabriel Huau2015-04-29-0/+42
* x86: Add alias for SPI node in the board dtsBin Meng2015-04-29-2/+11
* x86: chromebook_link: dts: Add PCH and LPC devicesSimon Glass2015-04-18-31/+39
* dm: x86: pci: Convert chromebook_link to use driver model for pciSimon Glass2015-04-18-1/+2
* dm: x86: pci: Convert coreboot to use driver model for pciSimon Glass2015-04-18-0/+7
* x86: Add support for panther (Asus Chromebox)Simon Glass2015-04-16-0/+65
* x86: Add SPI support to quark/galileoBin Meng2015-02-06-0/+13
* x86: galileo: Add GPIO supportBin Meng2015-02-06-0/+14
* x86: quark: Call MRC in dram_init()Bin Meng2015-02-06-0/+25
* x86: Add basic Intel Galileo board supportBin Meng2015-02-06-0/+44
* x86: Add support for Intel Minnowboard MaxSimon Glass2015-02-06-2/+3332
* x86: dts: Add SPI flash MRC details for chromebook_linkSimon Glass2015-01-24-1/+14
* x86: Make chromebook_link the default board for corebootBin Meng2015-01-13-219/+217
* x86: ivybridge: Update microcode early in bootSimon Glass2015-01-13-3/+0
* x86: crownbay: Add pci devices in the dts fileBin Meng2015-01-13-0/+81
* x86: Use ePAPR defined properties for x86-uartBin Meng2015-01-13-3/+2
* x86: Clean up the board dts filesBin Meng2015-01-12-24/+7
* x86: Rename coreboot.dsti to serial.dtsiBin Meng2015-01-12-2/+2
* x86: Remove alex.dts in arch/x86/dtsBin Meng2015-01-12-25/+0
* x86: Rename coreboot-serial to x86-serialBin Meng2014-12-18-1/+1
* x86: Convert microcode format to device-tree-onlySimon Glass2014-12-18-0/+7
* x86: Integrate Tunnel Creek processor microcodeBin Meng2014-12-18-0/+368
* x86: ivybridge: Update the microcodeSimon Glass2014-12-18-1374/+1502
* x86: Move microcode updates into a separate directorySimon Glass2014-12-18-2/+2
* x86: Add Intel Crown Bay board dts fileBin Meng2014-12-13-1/+55
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