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author | Bin Meng <bmeng.cn@gmail.com> | 2015-05-07 21:34:08 +0800 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2015-06-04 02:39:38 -0600 |
commit | a65b25d148fb0a9ef7dd5fba4ae2709f5bcae0c6 (patch) | |
tree | ddbf28ac4f0a34f5c8b62b80f59a0a93db645a01 /arch/x86/dts | |
parent | 238fe16c40f640e5b78828b21990a0565f408813 (diff) | |
download | u-boot-imx-a65b25d148fb0a9ef7dd5fba4ae2709f5bcae0c6.zip u-boot-imx-a65b25d148fb0a9ef7dd5fba4ae2709f5bcae0c6.tar.gz u-boot-imx-a65b25d148fb0a9ef7dd5fba4ae2709f5bcae0c6.tar.bz2 |
x86: Support QEMU x86 targets
This commit introduces the initial U-Boot support for QEMU x86 targets.
U-Boot can boot from coreboot as a payload, or directly without coreboot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Merged in patch 'x86: qemu: Add CMD_NET to qemu-x86_defconfig
https://patchwork.ozlabs.org/patch/479745/
Diffstat (limited to 'arch/x86/dts')
-rw-r--r-- | arch/x86/dts/Makefile | 3 | ||||
-rw-r--r-- | arch/x86/dts/qemu-x86.dts | 34 |
2 files changed, 36 insertions, 1 deletions
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile index 431bbd8..ca2eab3 100644 --- a/arch/x86/dts/Makefile +++ b/arch/x86/dts/Makefile @@ -2,7 +2,8 @@ dtb-y += chromebook_link.dtb \ chromebox_panther.dtb \ crownbay.dtb \ galileo.dtb \ - minnowmax.dtb + minnowmax.dtb \ + qemu-x86.dtb targets += $(dtb-y) diff --git a/arch/x86/dts/qemu-x86.dts b/arch/x86/dts/qemu-x86.dts new file mode 100644 index 0000000..f1291b5 --- /dev/null +++ b/arch/x86/dts/qemu-x86.dts @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +/include/ "skeleton.dtsi" +/include/ "serial.dtsi" + +/ { + model = "QEMU x86"; + compatible = "qemu,x86"; + + config { + silent_console = <0>; + }; + + chosen { + stdout-path = "/serial"; + }; + + pci { + compatible = "pci-x86"; + #address-cells = <3>; + #size-cells = <2>; + u-boot,dm-pre-reloc; + ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 + 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 + 0x01000000 0x0 0x2000 0x2000 0 0xe000>; + }; + +}; |