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path: root/arch/arm/include/asm/arch-fsl-layerscape/config.h
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* ARM: Migrate errata to KconfigTom Rini2017-03-09-6/+0
* board: freescale: ls1012a: Enable secure DDR on LS1012A platformsPrabhakar Kushwaha2017-02-03-0/+3
* armv8/ls1043a: fixup GIC offset for ls1043a rev1Wenbin Song2017-01-18-0/+22
* armv8/fsl_lsch2: Add the OCRAM initializationHou Zhiqiang2017-01-18-0/+3
* ARMv8/fsl-layerscape: Correct the OCRAM sizeHou Zhiqiang2017-01-18-3/+5
* arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun2017-01-04-20/+0
* fsl_ddr: Move DDR config options to driver KconfigYork Sun2017-01-04-2/+2
* crypto: Move CONFIG_SYS_FSL_SEC_LE and _BE to KconfigYork Sun2017-01-04-4/+0
* crypto: Move SYS_FSL_SEC_COMPAT into driver KconfigYork Sun2017-01-04-2/+0
* script: remove CONFIG_SYS_CCSRBAR_DEFAULT from white listYork Sun2016-12-02-1/+0
* armv8: fsl-layerscape: Add NXP LS2088A SoC supportPriyanka Jain2016-11-22-0/+1
* armv8: fsl-layerscape: Move DDR config options to KconfigYork Sun2016-10-06-14/+0
* arm: Move SYS_FSL_SRDS_* and SYS_HAS_SERDES to KconfigYork Sun2016-10-06-5/+0
* arm: Move FSL_HAS_DP_DDR and NUM_DDR_CONTROLLERS to KconfigYork Sun2016-10-06-3/+0
* arm: Move SYS_FSL_IFC_BANK_COUNT to KconfigYork Sun2016-10-06-3/+0
* arm: Move MAX_CPUS to KconfigYork Sun2016-10-06-4/+0
* Convert CONFIG_SYS_FSL_ERRATUM_A010315 to Kconfig optionYork Sun2016-09-26-1/+0
* armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig option ARCH_LS1021AYork Sun2016-09-26-4/+2
* armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046AYork Sun2016-09-26-1/+2
* armv8: ls1046a: Enable DDR erratum for ls1046aShengzhou Liu2016-09-14-0/+6
* armv8: fsl-layerscape: add define CONFIG_STANDALONE_LOAD_ADDR for standalone appShaohui Xie2016-09-14-0/+2
* driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012aShengzhou Liu2016-09-14-1/+3
* fsl-layerscape: Add workaround for PCIe erratum A010315Hou Zhiqiang2016-09-14-0/+2
* ARM: Move SYS_CACHELINE_SIZE over to KconfigTom Rini2016-08-26-2/+0
* armv8: fsl_lsch2: Add LS1046A SoC supportMingkai Hu2016-07-26-0/+27
* armv8: fsl-layerscape: Consolidate the LSCH2 common definesQianyu Gong2016-07-26-39/+20
* armv8: fsl-layerscape: Add support of QorIQ LS1012A SoCPrabhakar Kushwaha2016-06-03-0/+29
* driver/ddr/fsl: Add workaround for erratum A-010165Shengzhou Liu2016-05-18-0/+1
* arch/arm, arch/powerpc: add # of SEC engines on the SOCAlex Porosanu2016-05-18-0/+2
* driver/ddr/fsl: Add workaround for erratum A-009801Shengzhou Liu2016-05-17-0/+1
* armv8/ls1043: Add workaround for DDR erratum A-008850Shengzhou Liu2016-05-17-0/+1
* armv8: LS2080A: Consolidate LS2080A and LS2085AYork Sun2016-04-06-7/+2
* armv8: ls2080: Add config for endianess of CCSR GURSaksham Jain2016-03-29-0/+3
* armv8: fsl-lsch3: Add new header for secure bootSaksham Jain2016-03-29-1/+2
* armv8: ls2080: Add configs for SEC, SecMon, SRK and DCFGSaksham Jain2016-03-29-0/+10
* armv8: ls2080: Add SFP Configs for LS2080Saksham Jain2016-03-29-0/+4
* driver/ddr/fsl: Add workaround for erratum A-009803Shengzhou Liu2016-03-21-0/+1
* armv8: lsch3: Enable WUO config for RNI-20 nodePrabhakar Kushwaha2016-03-21-0/+2
* armv8/ls1043a: Implement workaround for erratum A009660Mingkai Hu2016-02-24-0/+1
* armv8/ls1043a: enable workaround for errarum A009942Shengzhou Liu2016-02-24-0/+1
* arm8: ls2080: Move the core errata defines out of board specific fileAshish kumar2016-02-01-0/+2
* armv8: ls2080a: Implement workaround for core errata 829520, 833471Ashish kumar2016-02-01-0/+4
* driver/ddr/fsl: Add workaround for A009663Shengzhou Liu2016-01-25-0/+3
* fsl/ddr: Add workaround for ERRATUM_A009942Shengzhou Liu2016-01-25-0/+1
* armv8/ls1043a: Implement workaround for PEX erratum A009929Mingkai Hu2015-12-17-0/+1
* armv8/ls1043ardb: add SECURE BOOT target for NORAneesh Bansal2015-12-15-2/+2
* armv8: fsl-layerscape: Make DDR non secure in MMU tablesYork Sun2015-12-15-0/+6
* armv8/ls1043ardb: Add support for >2GB memoryShaohui Xie2015-12-13-2/+2
* armv8: ls2085a: Add workaround of errata A009635Prabhakar Kushwaha2015-11-30-0/+9
* drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3York Sun2015-11-30-0/+7
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