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authorMingkai Hu <mingkai.hu@nxp.com>2016-02-02 11:28:03 +0800
committerYork Sun <york.sun@nxp.com>2016-02-24 08:40:56 -0800
commitbbc8e053bad16366fc74943ce4c69a910c31b8b8 (patch)
tree16ceab0d9a3f04295a2d9bdffbf0424d5cb99f36 /arch/arm/include/asm/arch-fsl-layerscape/config.h
parent3e0a0fbbac48e47d45e234691fddb55194052bed (diff)
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armv8/ls1043a: Implement workaround for erratum A009660
Memory controller performance is not optimal with default internal target queue register value, write required value for optimal DDR performance. Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/config.h')
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/config.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index a4eb096..0ef7c9d 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -178,6 +178,7 @@
#define CONFIG_SYS_FSL_ERRATUM_A009663
#define CONFIG_SYS_FSL_ERRATUM_A009929
#define CONFIG_SYS_FSL_ERRATUM_A009942
+#define CONFIG_SYS_FSL_ERRATUM_A009660
#else
#error SoC not defined
#endif