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path: root/arch/arm/cpu/armv7/omap5/sdram.c
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* ARM: DRA72: sdram: Update sdram ext phy configuration for SR2.0Nishanth Menon2016-03-27-1/+43
* ARM: DRA72x: Add support for detection of SR2.0Ravi Babu2016-03-27-0/+2
* ARM: DRA7: Move emif settings to board specific filesLokesh Vutla2016-03-14-147/+2
* ARM: DRA7: emif: Check for enable bits before updating leveling outputLokesh Vutla2016-03-14-8/+26
* ARM: DRA7: Add detection of ES2.0Nishanth Menon2015-08-28-0/+4
* ARM: DRA7xx: EMIF: Fix DLL_CALIB_CTRL registerLokesh Vutla2015-06-12-2/+2
* ARM: DRA72-evm: Enable HW levelingLokesh Vutla2015-06-12-6/+11
* ARM: DRA7-evm: Enable HW levelingLokesh Vutla2015-06-12-6/+16
* ARM: DRA7: DDR3: Add support for HW levelingLokesh Vutla2015-06-12-3/+73
* ARM: DRA7-evm: DDR3: Update leveling valuesLokesh Vutla2015-02-16-30/+30
* ARM: DRA7: EMIF: Update SDRAM_REF_CTRL register valueLokesh Vutla2015-02-16-3/+6
* ARM: DRA72x: DDR3: Fix EMIF timings for 666MHz clockAngela Stegmaier2015-02-16-8/+8
* arm: omap5: sdram: mark emif_get_ext_phy_ctrl_const_regs __weakFelipe Balbi2014-12-04-1/+1
* ARM: DRA72: DDR3: Add emif settings for 666MHz clockR Sricharan2014-09-04-1/+59
* ARM: DRA7: Enable software leveling for dra7Sricharan R2014-08-25-30/+30
* ARM: DRA72x: Update EMIF dataLokesh Vutla2014-05-23-1/+18
* DRA7: Add support for ES1.1 silicon ID codeNishanth Menon2014-01-24-0/+4
* ARM: DRA7/OMAP5: EMIF: Add workaround for bug 0039SRICHARAN R2013-12-04-0/+68
* ARM: DRA: EMIF: Change DDR3 settings to use hw levelingSRICHARAN R2013-12-04-61/+85
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
* ARM: DRA7xx: EMIF: Change settings required for EVM boardSricharan R2013-06-10-10/+160
* arm: dra7xx: Add DDR related data for DRA752 ES1.0Lokesh Vutla2013-03-11-2/+24
* ARM: OMAP5: Add DDR changes required for OMAP543X ES2.0 SOCsLokesh Vutla2013-03-11-2/+73
* ARM: OMAP4+: Cleanup emif specific filesLokesh Vutla2013-03-11-42/+77
* ARM: OMAP4+: Move external phy initialisations to arch specific place.SRICHARAN R2012-07-07-0/+31
* OMAP5: ADD precalculated timings for ddr3Lokesh Vutla2012-07-07-1/+49
* ARM: OMAP5: dmm: Create a tiler trap section.SRICHARAN R2012-07-07-3/+3
* OMAP5: ddr: Change the ddr device name.SRICHARAN R2012-05-15-0/+221
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