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author | Nishanth Menon <nm@ti.com> | 2014-01-14 10:54:42 -0600 |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2014-01-24 11:41:17 -0500 |
commit | 3ac8c0bf65759a1725e5dfc24a6e0214d6b37a4a (patch) | |
tree | a86046d5ce2a791ea4c9b2c459d20578c12339dd /arch/arm/cpu/armv7/omap5/sdram.c | |
parent | e9b13ce0b6f58f9d1c9d2a4f3e2927b671503a9e (diff) | |
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DRA7: Add support for ES1.1 silicon ID code
ES1.1 silicon is a very minor variant of ES1.0. Add priliminary support
for ES1.1 IDCODE change.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/omap5/sdram.c')
-rw-r--r-- | arch/arm/cpu/armv7/omap5/sdram.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c index 2e18706..16a91f9 100644 --- a/arch/arm/cpu/armv7/omap5/sdram.c +++ b/arch/arm/cpu/armv7/omap5/sdram.c @@ -245,6 +245,7 @@ static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs) *regs = &emif_regs_ddr3_532_mhz_1cs_es2; break; case DRA752_ES1_0: + case DRA752_ES1_1: switch (emif_nr) { case 1: *regs = &emif_1_regs_ddr3_532_mhz_1cs_dra_es1; @@ -273,6 +274,7 @@ static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs *dmm_lisa_regs = &lisa_map_4G_x_2_x_2; break; case DRA752_ES1_0: + case DRA752_ES1_1: default: *dmm_lisa_regs = &lisa_map_2G_x_2_x_2_2G_x_1_x_2; } @@ -460,6 +462,7 @@ static void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, *size = ARRAY_SIZE(ddr3_ext_phy_ctrl_const_base_es2); break; case DRA752_ES1_0: + case DRA752_ES1_1: if (emif_nr == 1) { *regs = dra_ddr3_ext_phy_ctrl_const_base_es1_emif1; *size = @@ -626,6 +629,7 @@ const struct read_write_regs *get_bug_regs(u32 *iterations) sizeof(omap5_bug_00339_regs[0]); break; case DRA752_ES1_0: + case DRA752_ES1_1: bug_00339_regs_ptr = dra_bug_00339_regs; *iterations = sizeof(dra_bug_00339_regs)/ sizeof(dra_bug_00339_regs[0]); |