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authorEugene O'Brien <eugene.obrien@advantechamt.com>2007-10-23 08:29:10 +0200
committerStefan Roese <sr@denx.de>2007-10-31 21:20:51 +0100
commit9f798766aa85e62eb8fa8c721e148df609b78137 (patch)
tree8c39fec8978f1f2dc98be422b3a9d0aad1211764 /mips_config.mk
parentafe9fa59cb63b4f9d16bf01c93eb212f25a38c2a (diff)
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ppc4xx: Fixed offset of refresh rate type for Bamboo on-board DDR SDRAM
This patch also adds a note to the fixed DDR setup for Bamboo NAND booting: Note: As found out by Eugene O'Brien <eugene.obrien@advantechamt.com>, the fixed DDR setup has problems (U-Boot crashes randomly upon TFTP), when the DIMM modules are still plugged in. So it is recommended to remove the DIMM modules while using the NAND booting code with the fixed SDRAM setup! Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com> Signed-off-by: Stefan Roese <sr@denx.de>
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