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-rw-r--r--board/amcc/bamboo/bamboo.c4
-rw-r--r--nand_spl/board/amcc/bamboo/sdram.c6
2 files changed, 8 insertions, 2 deletions
diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c
index 00c793a..c4eace5 100644
--- a/board/amcc/bamboo/bamboo.c
+++ b/board/amcc/bamboo/bamboo.c
@@ -67,13 +67,13 @@ const unsigned char cfg_simulate_spd_eeprom[128] = {
0x00, /* Module data width continued: +0 */
0x04, /* 2.5 Volt */
0x75, /* SDRAM Cycle Time (cas latency 2.5) = 7.5 ns */
+ 0x00, /* SDRAM Access from clock */
#ifdef CONFIG_DDR_ECC
0x02, /* ECC ON : 02 OFF : 00 */
#else
0x00, /* ECC ON : 02 OFF : 00 */
#endif
- 0x82, /* refresh Rate Type: Normal (15.625us) + Self refresh */
- 0,
+ 0x82, /* refresh Rate Type: Normal (7.8us) + Self refresh */
0,
0,
0x01, /* wcsbc = 1 */
diff --git a/nand_spl/board/amcc/bamboo/sdram.c b/nand_spl/board/amcc/bamboo/sdram.c
index 4f09072..ac77d06 100644
--- a/nand_spl/board/amcc/bamboo/sdram.c
+++ b/nand_spl/board/amcc/bamboo/sdram.c
@@ -44,6 +44,12 @@ static void wait_init_complete(void)
* not enough free space to implement the complete I2C SPD DDR autodetection
* routines. Therefore the Bamboo only supports the onboard 64MBytes of SDRAM
* when booting from NAND flash.
+ *
+ * Note:
+ * As found out by Eugene O'Brien <eugene.obrien@advantechamt.com>, the fixed
+ * DDR setup has problems (U-Boot crashes randomly upon TFTP), when the DIMM
+ * modules are still plugged in. So it is recommended to remove the DIMM
+ * modules while using the NAND booting code with the fixed SDRAM setup!
*/
void early_sdram_init(void)
{