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authorTom Rini <trini@ti.com>2014-12-11 20:47:34 -0500
committerTom Rini <trini@ti.com>2014-12-11 20:47:34 -0500
commita5a58826110eb3da2956c6b3213bd750e166d75c (patch)
tree50d21157a7118c6b2b13e7763452332f2d9b51fd /drivers
parentfc9b0b80435cda721fbdbe507c9e4f388b0ea62b (diff)
parentb0e6ef46405353270595ffa35c21f4334c541189 (diff)
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Merge git://git.denx.de/u-boot-dm
Diffstat (limited to 'drivers')
-rw-r--r--drivers/core/device.c6
-rw-r--r--drivers/i2c/Makefile2
-rw-r--r--drivers/i2c/i2c-emul-uclass.c14
-rw-r--r--drivers/i2c/i2c-uclass.c466
-rw-r--r--drivers/i2c/sandbox_i2c.c111
-rw-r--r--drivers/i2c/tegra_i2c.c366
-rw-r--r--drivers/misc/Makefile4
-rw-r--r--drivers/misc/i2c_eeprom.c51
-rw-r--r--drivers/misc/i2c_eeprom_emul.c168
-rw-r--r--drivers/power/tps6586x.c27
-rw-r--r--drivers/serial/serial_pl01x.c1
-rw-r--r--drivers/usb/gadget/ether.c24
12 files changed, 946 insertions, 294 deletions
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 6793e1c..963b16f 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -234,7 +234,7 @@ int device_probe(struct udevice *dev)
void *dev_get_platdata(struct udevice *dev)
{
if (!dev) {
- dm_warn("%s: null device", __func__);
+ dm_warn("%s: null device\n", __func__);
return NULL;
}
@@ -244,7 +244,7 @@ void *dev_get_platdata(struct udevice *dev)
void *dev_get_priv(struct udevice *dev)
{
if (!dev) {
- dm_warn("%s: null device", __func__);
+ dm_warn("%s: null device\n", __func__);
return NULL;
}
@@ -254,7 +254,7 @@ void *dev_get_priv(struct udevice *dev)
void *dev_get_parentdata(struct udevice *dev)
{
if (!dev) {
- dm_warn("%s: null device", __func__);
+ dm_warn("%s: null device\n", __func__);
return NULL;
}
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index dae3d71..6f3c86c 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -4,6 +4,7 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
+obj-$(CONFIG_DM_I2C) += i2c-uclass.o
obj-$(CONFIG_SYS_I2C_ADI) += adi_i2c.o
obj-$(CONFIG_I2C_MV) += mv_i2c.o
@@ -26,6 +27,7 @@ obj-$(CONFIG_SYS_I2C_OMAP34XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o
obj-$(CONFIG_SYS_I2C_RCAR) += rcar_i2c.o
obj-$(CONFIG_SYS_I2C_S3C24X0) += s3c24x0_i2c.o
+obj-$(CONFIG_SYS_I2C_SANDBOX) += sandbox_i2c.o i2c-emul-uclass.o
obj-$(CONFIG_SYS_I2C_SH) += sh_i2c.o
obj-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
obj-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
diff --git a/drivers/i2c/i2c-emul-uclass.c b/drivers/i2c/i2c-emul-uclass.c
new file mode 100644
index 0000000..aa89f95
--- /dev/null
+++ b/drivers/i2c/i2c-emul-uclass.c
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <i2c.h>
+
+UCLASS_DRIVER(i2c_emul) = {
+ .id = UCLASS_I2C_EMUL,
+ .name = "i2c_emul",
+};
diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
new file mode 100644
index 0000000..005bf86
--- /dev/null
+++ b/drivers/i2c/i2c-uclass.c
@@ -0,0 +1,466 @@
+/*
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <i2c.h>
+#include <malloc.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/root.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define I2C_MAX_OFFSET_LEN 4
+
+/**
+ * i2c_setup_offset() - Set up a new message with a chip offset
+ *
+ * @chip: Chip to use
+ * @offset: Byte offset within chip
+ * @offset_buf: Place to put byte offset
+ * @msg: Message buffer
+ * @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the
+ * message is still set up but will not contain an offset.
+ */
+static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset,
+ uint8_t offset_buf[], struct i2c_msg *msg)
+{
+ int offset_len;
+
+ msg->addr = chip->chip_addr;
+ msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
+ msg->len = chip->offset_len;
+ msg->buf = offset_buf;
+ if (!chip->offset_len)
+ return -EADDRNOTAVAIL;
+ assert(chip->offset_len <= I2C_MAX_OFFSET_LEN);
+ offset_len = chip->offset_len;
+ while (offset_len--)
+ *offset_buf++ = offset >> (8 * offset_len);
+
+ return 0;
+}
+
+static int i2c_read_bytewise(struct udevice *dev, uint offset,
+ uint8_t *buffer, int len)
+{
+ struct dm_i2c_chip *chip = dev_get_parentdata(dev);
+ struct udevice *bus = dev_get_parent(dev);
+ struct dm_i2c_ops *ops = i2c_get_ops(bus);
+ struct i2c_msg msg[2], *ptr;
+ uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
+ int ret;
+ int i;
+
+ for (i = 0; i < len; i++) {
+ if (i2c_setup_offset(chip, offset + i, offset_buf, msg))
+ return -EINVAL;
+ ptr = msg + 1;
+ ptr->addr = chip->chip_addr;
+ ptr->flags = msg->flags | I2C_M_RD;
+ ptr->len = 1;
+ ptr->buf = &buffer[i];
+ ptr++;
+
+ ret = ops->xfer(bus, msg, ptr - msg);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static int i2c_write_bytewise(struct udevice *dev, uint offset,
+ const uint8_t *buffer, int len)
+{
+ struct dm_i2c_chip *chip = dev_get_parentdata(dev);
+ struct udevice *bus = dev_get_parent(dev);
+ struct dm_i2c_ops *ops = i2c_get_ops(bus);
+ struct i2c_msg msg[1];
+ uint8_t buf[I2C_MAX_OFFSET_LEN + 1];
+ int ret;
+ int i;
+
+ for (i = 0; i < len; i++) {
+ if (i2c_setup_offset(chip, offset + i, buf, msg))
+ return -EINVAL;
+ buf[msg->len++] = buffer[i];
+
+ ret = ops->xfer(bus, msg, 1);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+int i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len)
+{
+ struct dm_i2c_chip *chip = dev_get_parentdata(dev);
+ struct udevice *bus = dev_get_parent(dev);
+ struct dm_i2c_ops *ops = i2c_get_ops(bus);
+ struct i2c_msg msg[2], *ptr;
+ uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
+ int msg_count;
+
+ if (!ops->xfer)
+ return -ENOSYS;
+ if (chip->flags & DM_I2C_CHIP_RD_ADDRESS)
+ return i2c_read_bytewise(dev, offset, buffer, len);
+ ptr = msg;
+ if (!i2c_setup_offset(chip, offset, offset_buf, ptr))
+ ptr++;
+
+ if (len) {
+ ptr->addr = chip->chip_addr;
+ ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
+ ptr->flags |= I2C_M_RD;
+ ptr->len = len;
+ ptr->buf = buffer;
+ ptr++;
+ }
+ msg_count = ptr - msg;
+
+ return ops->xfer(bus, msg, msg_count);
+}
+
+int i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, int len)
+{
+ struct dm_i2c_chip *chip = dev_get_parentdata(dev);
+ struct udevice *bus = dev_get_parent(dev);
+ struct dm_i2c_ops *ops = i2c_get_ops(bus);
+ struct i2c_msg msg[1];
+
+ if (!ops->xfer)
+ return -ENOSYS;
+
+ if (chip->flags & DM_I2C_CHIP_WR_ADDRESS)
+ return i2c_write_bytewise(dev, offset, buffer, len);
+ /*
+ * The simple approach would be to send two messages here: one to
+ * set the offset and one to write the bytes. However some drivers
+ * will not be expecting this, and some chips won't like how the
+ * driver presents this on the I2C bus.
+ *
+ * The API does not support separate offset and data. We could extend
+ * it with a flag indicating that there is data in the next message
+ * that needs to be processed in the same transaction. We could
+ * instead add an additional buffer to each message. For now, handle
+ * this in the uclass since it isn't clear what the impact on drivers
+ * would be with this extra complication. Unfortunately this means
+ * copying the message.
+ *
+ * Use the stack for small messages, malloc() for larger ones. We
+ * need to allow space for the offset (up to 4 bytes) and the message
+ * itself.
+ */
+ if (len < 64) {
+ uint8_t buf[I2C_MAX_OFFSET_LEN + len];
+
+ i2c_setup_offset(chip, offset, buf, msg);
+ msg->len += len;
+ memcpy(buf + chip->offset_len, buffer, len);
+
+ return ops->xfer(bus, msg, 1);
+ } else {
+ uint8_t *buf;
+ int ret;
+
+ buf = malloc(I2C_MAX_OFFSET_LEN + len);
+ if (!buf)
+ return -ENOMEM;
+ i2c_setup_offset(chip, offset, buf, msg);
+ msg->len += len;
+ memcpy(buf + chip->offset_len, buffer, len);
+
+ ret = ops->xfer(bus, msg, 1);
+ free(buf);
+ return ret;
+ }
+}
+
+/**
+ * i2c_probe_chip() - probe for a chip on a bus
+ *
+ * @bus: Bus to probe
+ * @chip_addr: Chip address to probe
+ * @flags: Flags for the chip
+ * @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip
+ * does not respond to probe
+ */
+static int i2c_probe_chip(struct udevice *bus, uint chip_addr,
+ enum dm_i2c_chip_flags chip_flags)
+{
+ struct dm_i2c_ops *ops = i2c_get_ops(bus);
+ struct i2c_msg msg[1];
+ int ret;
+
+ if (ops->probe_chip) {
+ ret = ops->probe_chip(bus, chip_addr, chip_flags);
+ if (!ret || ret != -ENOSYS)
+ return ret;
+ }
+
+ if (!ops->xfer)
+ return -ENOSYS;
+
+ /* Probe with a zero-length message */
+ msg->addr = chip_addr;
+ msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
+ msg->len = 0;
+ msg->buf = NULL;
+
+ return ops->xfer(bus, msg, 1);
+}
+
+static int i2c_bind_driver(struct udevice *bus, uint chip_addr,
+ struct udevice **devp)
+{
+ struct dm_i2c_chip chip;
+ char name[30], *str;
+ struct udevice *dev;
+ int ret;
+
+ snprintf(name, sizeof(name), "generic_%x", chip_addr);
+ str = strdup(name);
+ ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev);
+ debug("%s: device_bind_driver: ret=%d\n", __func__, ret);
+ if (ret)
+ goto err_bind;
+
+ /* Tell the device what we know about it */
+ memset(&chip, '\0', sizeof(chip));
+ chip.chip_addr = chip_addr;
+ chip.offset_len = 1; /* we assume */
+ ret = device_probe_child(dev, &chip);
+ debug("%s: device_probe_child: ret=%d\n", __func__, ret);
+ if (ret)
+ goto err_probe;
+
+ *devp = dev;
+ return 0;
+
+err_probe:
+ device_unbind(dev);
+err_bind:
+ free(str);
+ return ret;
+}
+
+int i2c_get_chip(struct udevice *bus, uint chip_addr, struct udevice **devp)
+{
+ struct udevice *dev;
+
+ debug("%s: Searching bus '%s' for address %02x: ", __func__,
+ bus->name, chip_addr);
+ for (device_find_first_child(bus, &dev); dev;
+ device_find_next_child(&dev)) {
+ struct dm_i2c_chip store;
+ struct dm_i2c_chip *chip = dev_get_parentdata(dev);
+ int ret;
+
+ if (!chip) {
+ chip = &store;
+ i2c_chip_ofdata_to_platdata(gd->fdt_blob,
+ dev->of_offset, chip);
+ }
+ if (chip->chip_addr == chip_addr) {
+ ret = device_probe(dev);
+ debug("found, ret=%d\n", ret);
+ if (ret)
+ return ret;
+ *devp = dev;
+ return 0;
+ }
+ }
+ debug("not found\n");
+ return i2c_bind_driver(bus, chip_addr, devp);
+}
+
+int i2c_get_chip_for_busnum(int busnum, int chip_addr, struct udevice **devp)
+{
+ struct udevice *bus;
+ int ret;
+
+ ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
+ if (ret) {
+ debug("Cannot find I2C bus %d\n", busnum);
+ return ret;
+ }
+ ret = i2c_get_chip(bus, chip_addr, devp);
+ if (ret) {
+ debug("Cannot find I2C chip %02x on bus %d\n", chip_addr,
+ busnum);
+ return ret;
+ }
+
+ return 0;
+}
+
+int i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
+ struct udevice **devp)
+{
+ int ret;
+
+ *devp = NULL;
+
+ /* First probe that chip */
+ ret = i2c_probe_chip(bus, chip_addr, chip_flags);
+ debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
+ chip_addr, ret);
+ if (ret)
+ return ret;
+
+ /* The chip was found, see if we have a driver, and probe it */
+ ret = i2c_get_chip(bus, chip_addr, devp);
+ debug("%s: i2c_get_chip: ret=%d\n", __func__, ret);
+
+ return ret;
+}
+
+int i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
+{
+ struct dm_i2c_ops *ops = i2c_get_ops(bus);
+ struct dm_i2c_bus *i2c = bus->uclass_priv;
+ int ret;
+
+ /*
+ * If we have a method, call it. If not then the driver probably wants
+ * to deal with speed changes on the next transfer. It can easily read
+ * the current speed from this uclass
+ */
+ if (ops->set_bus_speed) {
+ ret = ops->set_bus_speed(bus, speed);
+ if (ret)
+ return ret;
+ }
+ i2c->speed_hz = speed;
+
+ return 0;
+}
+
+/*
+ * i2c_get_bus_speed:
+ *
+ * Returns speed of selected I2C bus in Hz
+ */
+int i2c_get_bus_speed(struct udevice *bus)
+{
+ struct dm_i2c_ops *ops = i2c_get_ops(bus);
+ struct dm_i2c_bus *i2c = bus->uclass_priv;
+
+ if (!ops->get_bus_speed)
+ return i2c->speed_hz;
+
+ return ops->get_bus_speed(bus);
+}
+
+int i2c_set_chip_flags(struct udevice *dev, uint flags)
+{
+ struct udevice *bus = dev->parent;
+ struct dm_i2c_chip *chip = dev_get_parentdata(dev);
+ struct dm_i2c_ops *ops = i2c_get_ops(bus);
+ int ret;
+
+ if (ops->set_flags) {
+ ret = ops->set_flags(dev, flags);
+ if (ret)
+ return ret;
+ }
+ chip->flags = flags;
+
+ return 0;
+}
+
+int i2c_get_chip_flags(struct udevice *dev, uint *flagsp)
+{
+ struct dm_i2c_chip *chip = dev_get_parentdata(dev);
+
+ *flagsp = chip->flags;
+
+ return 0;
+}
+
+int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len)
+{
+ struct dm_i2c_chip *chip = dev_get_parentdata(dev);
+
+ if (offset_len > I2C_MAX_OFFSET_LEN)
+ return -EINVAL;
+ chip->offset_len = offset_len;
+
+ return 0;
+}
+
+int i2c_deblock(struct udevice *bus)
+{
+ struct dm_i2c_ops *ops = i2c_get_ops(bus);
+
+ /*
+ * We could implement a software deblocking here if we could get
+ * access to the GPIOs used by I2C, and switch them to GPIO mode
+ * and then back to I2C. This is somewhat beyond our powers in
+ * driver model at present, so for now just fail.
+ *
+ * See https://patchwork.ozlabs.org/patch/399040/
+ */
+ if (!ops->deblock)
+ return -ENOSYS;
+
+ return ops->deblock(bus);
+}
+
+int i2c_chip_ofdata_to_platdata(const void *blob, int node,
+ struct dm_i2c_chip *chip)
+{
+ chip->offset_len = 1; /* default */
+ chip->flags = 0;
+ chip->chip_addr = fdtdec_get_int(gd->fdt_blob, node, "reg", -1);
+ if (chip->chip_addr == -1) {
+ debug("%s: I2C Node '%s' has no 'reg' property\n", __func__,
+ fdt_get_name(blob, node, NULL));
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int i2c_post_probe(struct udevice *dev)
+{
+ struct dm_i2c_bus *i2c = dev->uclass_priv;
+
+ i2c->speed_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+ "clock-frequency", 100000);
+
+ return i2c_set_bus_speed(dev, i2c->speed_hz);
+}
+
+int i2c_post_bind(struct udevice *dev)
+{
+ /* Scan the bus for devices */
+ return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
+}
+
+UCLASS_DRIVER(i2c) = {
+ .id = UCLASS_I2C,
+ .name = "i2c",
+ .per_device_auto_alloc_size = sizeof(struct dm_i2c_bus),
+ .post_bind = i2c_post_bind,
+ .post_probe = i2c_post_probe,
+};
+
+UCLASS_DRIVER(i2c_generic) = {
+ .id = UCLASS_I2C_GENERIC,
+ .name = "i2c_generic",
+};
+
+U_BOOT_DRIVER(i2c_generic_chip_drv) = {
+ .name = "i2c_generic_chip_drv",
+ .id = UCLASS_I2C_GENERIC,
+};
diff --git a/drivers/i2c/sandbox_i2c.c b/drivers/i2c/sandbox_i2c.c
new file mode 100644
index 0000000..f0e9f51
--- /dev/null
+++ b/drivers/i2c/sandbox_i2c.c
@@ -0,0 +1,111 @@
+/*
+ * Simulate an I2C port
+ *
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <i2c.h>
+#include <asm/test.h>
+#include <dm/lists.h>
+#include <dm/device-internal.h>
+#include <dm/root.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dm_sandbox_i2c_emul_priv {
+ struct udevice *emul;
+};
+
+static int get_emul(struct udevice *dev, struct udevice **devp,
+ struct dm_i2c_ops **opsp)
+{
+ struct dm_i2c_chip *priv;
+ int ret;
+
+ *devp = NULL;
+ *opsp = NULL;
+ priv = dev_get_parentdata(dev);
+ if (!priv->emul) {
+ ret = dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset,
+ false);
+ if (ret)
+ return ret;
+
+ ret = device_get_child(dev, 0, &priv->emul);
+ if (ret)
+ return ret;
+ }
+ *devp = priv->emul;
+ *opsp = i2c_get_ops(priv->emul);
+
+ return 0;
+}
+
+static int sandbox_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
+ int nmsgs)
+{
+ struct dm_i2c_bus *i2c = bus->uclass_priv;
+ struct dm_i2c_ops *ops;
+ struct udevice *emul, *dev;
+ bool is_read;
+ int ret;
+
+ /* Special test code to return success but with no emulation */
+ if (msg->addr == SANDBOX_I2C_TEST_ADDR)
+ return 0;
+
+ ret = i2c_get_chip(bus, msg->addr, &dev);
+ if (ret)
+ return ret;
+
+ ret = get_emul(dev, &emul, &ops);
+ if (ret)
+ return ret;
+
+ /*
+ * For testing, don't allow writing above 100KHz for writes and
+ * 400KHz for reads
+ */
+ is_read = nmsgs > 1;
+ if (i2c->speed_hz > (is_read ? 400000 : 100000))
+ return -EINVAL;
+ return ops->xfer(emul, msg, nmsgs);
+}
+
+static const struct dm_i2c_ops sandbox_i2c_ops = {
+ .xfer = sandbox_i2c_xfer,
+};
+
+static int sandbox_i2c_child_pre_probe(struct udevice *dev)
+{
+ struct dm_i2c_chip *i2c_chip = dev_get_parentdata(dev);
+
+ /* Ignore our test address */
+ if (i2c_chip->chip_addr == SANDBOX_I2C_TEST_ADDR)
+ return 0;
+ if (dev->of_offset == -1)
+ return 0;
+
+ return i2c_chip_ofdata_to_platdata(gd->fdt_blob, dev->of_offset,
+ i2c_chip);
+}
+
+static const struct udevice_id sandbox_i2c_ids[] = {
+ { .compatible = "sandbox,i2c" },
+ { }
+};
+
+U_BOOT_DRIVER(i2c_sandbox) = {
+ .name = "i2c_sandbox",
+ .id = UCLASS_I2C,
+ .of_match = sandbox_i2c_ids,
+ .per_child_auto_alloc_size = sizeof(struct dm_i2c_chip),
+ .child_pre_probe = sandbox_i2c_child_pre_probe,
+ .ops = &sandbox_i2c_ops,
+};
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index 562211e..87290c3 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -7,6 +7,8 @@
*/
#include <common.h>
+#include <dm.h>
+#include <errno.h>
#include <fdtdec.h>
#include <i2c.h>
#include <asm/io.h>
@@ -19,6 +21,12 @@
DECLARE_GLOBAL_DATA_PTR;
+enum i2c_type {
+ TYPE_114,
+ TYPE_STD,
+ TYPE_DVC,
+};
+
/* Information about i2c controller */
struct i2c_bus {
int id;
@@ -27,20 +35,17 @@ struct i2c_bus {
int pinmux_config;
struct i2c_control *control;
struct i2c_ctlr *regs;
- int is_dvc; /* DVC type, rather than I2C */
- int is_scs; /* single clock source (T114+) */
+ enum i2c_type type;
int inited; /* bus is inited */
};
-static struct i2c_bus i2c_controllers[TEGRA_I2C_NUM_CONTROLLERS];
-
static void set_packet_mode(struct i2c_bus *i2c_bus)
{
u32 config;
config = I2C_CNFG_NEW_MASTER_FSM_MASK | I2C_CNFG_PACKET_MODE_MASK;
- if (i2c_bus->is_dvc) {
+ if (i2c_bus->type == TYPE_DVC) {
struct dvc_ctlr *dvc = (struct dvc_ctlr *)i2c_bus->regs;
writel(config, &dvc->cnfg);
@@ -65,6 +70,9 @@ static void i2c_reset_controller(struct i2c_bus *i2c_bus)
static void i2c_init_controller(struct i2c_bus *i2c_bus)
{
+ if (!i2c_bus->speed)
+ return;
+ debug("%s: speed=%d\n", __func__, i2c_bus->speed);
/*
* Use PLLP - DP-04508-001_v06 datasheet indicates a divisor of 8
* here, in section 23.3.1, but in fact we seem to need a factor of
@@ -73,7 +81,7 @@ static void i2c_init_controller(struct i2c_bus *i2c_bus)
clock_start_periph_pll(i2c_bus->periph_id, CLOCK_ID_PERIPH,
i2c_bus->speed * 2 * 8);
- if (i2c_bus->is_scs) {
+ if (i2c_bus->type == TYPE_114) {
/*
* T114 I2C went to a single clock source for standard/fast and
* HS clock speeds. The new clock rate setting calculation is:
@@ -98,7 +106,7 @@ static void i2c_init_controller(struct i2c_bus *i2c_bus)
i2c_reset_controller(i2c_bus);
/* Configure I2C controller. */
- if (i2c_bus->is_dvc) { /* only for DVC I2C */
+ if (i2c_bus->type == TYPE_DVC) { /* only for DVC I2C */
struct dvc_ctlr *dvc = (struct dvc_ctlr *)i2c_bus->regs;
setbits_le32(&dvc->ctrl3, DVC_CTRL_REG3_I2C_HW_SW_PROG_MASK);
@@ -272,7 +280,7 @@ exit:
return error;
}
-static int tegra_i2c_write_data(struct i2c_bus *bus, u32 addr, u8 *data,
+static int tegra_i2c_write_data(struct i2c_bus *i2c_bus, u32 addr, u8 *data,
u32 len, bool end_with_repeated_start)
{
int error;
@@ -286,14 +294,14 @@ static int tegra_i2c_write_data(struct i2c_bus *bus, u32 addr, u8 *data,
trans_info.num_bytes = len;
trans_info.is_10bit_address = 0;
- error = send_recv_packets(bus, &trans_info);
+ error = send_recv_packets(i2c_bus, &trans_info);
if (error)
debug("tegra_i2c_write_data: Error (%d) !!!\n", error);
return error;
}
-static int tegra_i2c_read_data(struct i2c_bus *bus, u32 addr, u8 *data,
+static int tegra_i2c_read_data(struct i2c_bus *i2c_bus, u32 addr, u8 *data,
u32 len)
{
int error;
@@ -305,52 +313,32 @@ static int tegra_i2c_read_data(struct i2c_bus *bus, u32 addr, u8 *data,
trans_info.num_bytes = len;
trans_info.is_10bit_address = 0;
- error = send_recv_packets(bus, &trans_info);
+ error = send_recv_packets(i2c_bus, &trans_info);
if (error)
debug("tegra_i2c_read_data: Error (%d) !!!\n", error);
return error;
}
-#ifndef CONFIG_OF_CONTROL
-#error "Please enable device tree support to use this driver"
-#endif
-
-/**
- * Check that a bus number is valid and return a pointer to it
- *
- * @param bus_num Bus number to check / return
- * @return pointer to bus, if valid, else NULL
- */
-static struct i2c_bus *tegra_i2c_get_bus(struct i2c_adapter *adap)
+static int tegra_i2c_set_bus_speed(struct udevice *dev, unsigned int speed)
{
- struct i2c_bus *bus;
+ struct i2c_bus *i2c_bus = dev_get_priv(dev);
- bus = &i2c_controllers[adap->hwadapnr];
- if (!bus->inited) {
- debug("%s: Bus %u not available\n", __func__, adap->hwadapnr);
- return NULL;
- }
-
- return bus;
-}
-
-static unsigned int tegra_i2c_set_bus_speed(struct i2c_adapter *adap,
- unsigned int speed)
-{
- struct i2c_bus *bus;
-
- bus = tegra_i2c_get_bus(adap);
- if (!bus)
- return 0;
- bus->speed = speed;
- i2c_init_controller(bus);
+ i2c_bus->speed = speed;
+ i2c_init_controller(i2c_bus);
return 0;
}
-static int i2c_get_config(const void *blob, int node, struct i2c_bus *i2c_bus)
+static int tegra_i2c_probe(struct udevice *dev)
{
+ struct i2c_bus *i2c_bus = dev_get_priv(dev);
+ const void *blob = gd->fdt_blob;
+ int node = dev->of_offset;
+ bool is_dvc;
+
+ i2c_bus->id = dev->seq;
+ i2c_bus->type = dev_get_of_data(dev);
i2c_bus->regs = (struct i2c_ctlr *)fdtdec_get_addr(blob, node, "reg");
/*
@@ -358,7 +346,6 @@ static int i2c_get_config(const void *blob, int node, struct i2c_bus *i2c_bus)
* far no one needs anything other than the default.
*/
i2c_bus->pinmux_config = FUNCMUX_DEFAULT;
- i2c_bus->speed = fdtdec_get_int(blob, node, "clock-frequency", 0);
i2c_bus->periph_id = clock_decode_periph_id(blob, node);
/*
@@ -371,107 +358,25 @@ static int i2c_get_config(const void *blob, int node, struct i2c_bus *i2c_bus)
* i2c_bus->pinmux_config = FUNCMUX_I2C2_PTA;
*/
if (i2c_bus->periph_id == -1)
- return -FDT_ERR_NOTFOUND;
+ return -EINVAL;
- return 0;
-}
-
-/*
- * Process a list of nodes, adding them to our list of I2C ports.
- *
- * @param blob fdt blob
- * @param node_list list of nodes to process (any <=0 are ignored)
- * @param count number of nodes to process
- * @param is_dvc 1 if these are DVC ports, 0 if standard I2C
- * @param is_scs 1 if this HW uses a single clock source (T114+)
- * @return 0 if ok, -1 on error
- */
-static int process_nodes(const void *blob, int node_list[], int count,
- int is_dvc, int is_scs)
-{
- struct i2c_bus *i2c_bus;
- int i;
-
- /* build the i2c_controllers[] for each controller */
- for (i = 0; i < count; i++) {
- int node = node_list[i];
-
- if (node <= 0)
- continue;
-
- i2c_bus = &i2c_controllers[i];
- i2c_bus->id = i;
-
- if (i2c_get_config(blob, node, i2c_bus)) {
- printf("i2c_init_board: failed to decode bus %d\n", i);
- return -1;
- }
-
- i2c_bus->is_scs = is_scs;
-
- i2c_bus->is_dvc = is_dvc;
- if (is_dvc) {
- i2c_bus->control =
- &((struct dvc_ctlr *)i2c_bus->regs)->control;
- } else {
- i2c_bus->control = &i2c_bus->regs->control;
- }
- debug("%s: controller bus %d at %p, periph_id %d, speed %d: ",
- is_dvc ? "dvc" : "i2c", i, i2c_bus->regs,
- i2c_bus->periph_id, i2c_bus->speed);
- i2c_init_controller(i2c_bus);
- debug("ok\n");
- i2c_bus->inited = 1;
-
- /* Mark position as used */
- node_list[i] = -1;
+ is_dvc = dev_get_of_data(dev) == TYPE_DVC;
+ if (is_dvc) {
+ i2c_bus->control =
+ &((struct dvc_ctlr *)i2c_bus->regs)->control;
+ } else {
+ i2c_bus->control = &i2c_bus->regs->control;
}
+ i2c_init_controller(i2c_bus);
+ debug("%s: controller bus %d at %p, periph_id %d, speed %d: ",
+ is_dvc ? "dvc" : "i2c", dev->seq, i2c_bus->regs,
+ i2c_bus->periph_id, i2c_bus->speed);
return 0;
}
-/* Sadly there is no error return from this function */
-void i2c_init_board(void)
-{
- int node_list[TEGRA_I2C_NUM_CONTROLLERS];
- const void *blob = gd->fdt_blob;
- int count;
-
- /* First check for newer (T114+) I2C ports */
- count = fdtdec_find_aliases_for_id(blob, "i2c",
- COMPAT_NVIDIA_TEGRA114_I2C, node_list,
- TEGRA_I2C_NUM_CONTROLLERS);
- if (process_nodes(blob, node_list, count, 0, 1))
- return;
-
- /* Now get the older (T20/T30) normal I2C ports */
- count = fdtdec_find_aliases_for_id(blob, "i2c",
- COMPAT_NVIDIA_TEGRA20_I2C, node_list,
- TEGRA_I2C_NUM_CONTROLLERS);
- if (process_nodes(blob, node_list, count, 0, 0))
- return;
-
- /* Now look for dvc ports */
- count = fdtdec_add_aliases_for_id(blob, "i2c",
- COMPAT_NVIDIA_TEGRA20_DVC, node_list,
- TEGRA_I2C_NUM_CONTROLLERS);
- if (process_nodes(blob, node_list, count, 1, 0))
- return;
-}
-
-static void tegra_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
-{
- /* No i2c support prior to relocation */
- if (!(gd->flags & GD_FLG_RELOC))
- return;
-
- /* This will override the speed selected in the fdt for that port */
- debug("i2c_init(speed=%u, slaveaddr=0x%x)\n", speed, slaveaddr);
- i2c_set_bus_speed(speed);
-}
-
/* i2c write version without the register address */
-static int i2c_write_data(struct i2c_bus *bus, uchar chip, uchar *buffer,
+static int i2c_write_data(struct i2c_bus *i2c_bus, uchar chip, uchar *buffer,
int len, bool end_with_repeated_start)
{
int rc;
@@ -484,7 +389,7 @@ static int i2c_write_data(struct i2c_bus *bus, uchar chip, uchar *buffer,
debug("\n");
/* Shift 7-bit address over for lower-level i2c functions */
- rc = tegra_i2c_write_data(bus, chip << 1, buffer, len,
+ rc = tegra_i2c_write_data(i2c_bus, chip << 1, buffer, len,
end_with_repeated_start);
if (rc)
debug("i2c_write_data(): rc=%d\n", rc);
@@ -493,14 +398,14 @@ static int i2c_write_data(struct i2c_bus *bus, uchar chip, uchar *buffer,
}
/* i2c read version without the register address */
-static int i2c_read_data(struct i2c_bus *bus, uchar chip, uchar *buffer,
- int len)
+static int i2c_read_data(struct i2c_bus *i2c_bus, uchar chip, uchar *buffer,
+ int len)
{
int rc;
debug("inside i2c_read_data():\n");
/* Shift 7-bit address over for lower-level i2c functions */
- rc = tegra_i2c_read_data(bus, chip << 1, buffer, len);
+ rc = tegra_i2c_read_data(i2c_bus, chip << 1, buffer, len);
if (rc) {
debug("i2c_read_data(): rc=%d\n", rc);
return rc;
@@ -516,132 +421,99 @@ static int i2c_read_data(struct i2c_bus *bus, uchar chip, uchar *buffer,
}
/* Probe to see if a chip is present. */
-static int tegra_i2c_probe(struct i2c_adapter *adap, uchar chip)
+static int tegra_i2c_probe_chip(struct udevice *bus, uint chip_addr,
+ uint chip_flags)
{
- struct i2c_bus *bus;
+ struct i2c_bus *i2c_bus = dev_get_priv(bus);
int rc;
- uchar reg;
-
- debug("i2c_probe: addr=0x%x\n", chip);
- bus = tegra_i2c_get_bus(adap);
- if (!bus)
- return 1;
- reg = 0;
- rc = i2c_write_data(bus, chip, &reg, 1, false);
- if (rc) {
- debug("Error probing 0x%x.\n", chip);
- return 1;
- }
- return 0;
-}
+ u8 reg;
-static int i2c_addr_ok(const uint addr, const int alen)
-{
- /* We support 7 or 10 bit addresses, so one or two bytes each */
- return alen == 1 || alen == 2;
+ /* Shift 7-bit address over for lower-level i2c functions */
+ rc = tegra_i2c_write_data(i2c_bus, chip_addr << 1, &reg, sizeof(reg),
+ false);
+
+ return rc;
}
-/* Read bytes */
-static int tegra_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
- int alen, uchar *buffer, int len)
+static int tegra_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
+ int nmsgs)
{
- struct i2c_bus *bus;
- uint offset;
- int i;
-
- debug("i2c_read: chip=0x%x, addr=0x%x, alen=0x%x len=0x%x\n",
- chip, addr, alen, len);
- bus = tegra_i2c_get_bus(adap);
- if (!bus)
- return 1;
- if (!i2c_addr_ok(addr, alen)) {
- debug("i2c_read: Bad address %x.%d.\n", addr, alen);
- return 1;
- }
- for (offset = 0; offset < len; offset++) {
- if (alen) {
- uchar data[alen];
- for (i = 0; i < alen; i++) {
- data[alen - i - 1] =
- (addr + offset) >> (8 * i);
- }
- if (i2c_write_data(bus, chip, data, alen, true)) {
- debug("i2c_read: error sending (0x%x)\n",
- addr);
- return 1;
- }
+ struct i2c_bus *i2c_bus = dev_get_priv(bus);
+ int ret;
+
+ debug("i2c_xfer: %d messages\n", nmsgs);
+ for (; nmsgs > 0; nmsgs--, msg++) {
+ bool next_is_read = nmsgs > 1 && (msg[1].flags & I2C_M_RD);
+
+ debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
+ if (msg->flags & I2C_M_RD) {
+ ret = i2c_read_data(i2c_bus, msg->addr, msg->buf,
+ msg->len);
+ } else {
+ ret = i2c_write_data(i2c_bus, msg->addr, msg->buf,
+ msg->len, next_is_read);
}
- if (i2c_read_data(bus, chip, buffer + offset, 1)) {
- debug("i2c_read: error reading (0x%x)\n", addr);
- return 1;
+ if (ret) {
+ debug("i2c_write: error sending\n");
+ return -EREMOTEIO;
}
}
return 0;
}
-/* Write bytes */
-static int tegra_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
- int alen, uchar *buffer, int len)
+int tegra_i2c_get_dvc_bus(struct udevice **busp)
{
- struct i2c_bus *bus;
- uint offset;
- int i;
-
- debug("i2c_write: chip=0x%x, addr=0x%x, alen=0x%x len=0x%x\n",
- chip, addr, alen, len);
- bus = tegra_i2c_get_bus(adap);
- if (!bus)
- return 1;
- if (!i2c_addr_ok(addr, alen)) {
- debug("i2c_write: Bad address %x.%d.\n", addr, alen);
- return 1;
- }
- for (offset = 0; offset < len; offset++) {
- uchar data[alen + 1];
- for (i = 0; i < alen; i++)
- data[alen - i - 1] = (addr + offset) >> (8 * i);
- data[alen] = buffer[offset];
- if (i2c_write_data(bus, chip, data, alen + 1, false)) {
- debug("i2c_write: error sending (0x%x)\n", addr);
- return 1;
+ struct udevice *bus;
+
+ for (uclass_first_device(UCLASS_I2C, &bus);
+ bus;
+ uclass_next_device(&bus)) {
+ if (dev_get_of_data(bus) == TYPE_DVC) {
+ *busp = bus;
+ return 0;
}
}
- return 0;
+ return -ENODEV;
}
-int tegra_i2c_get_dvc_bus_num(void)
-{
- int i;
+static const struct dm_i2c_ops tegra_i2c_ops = {
+ .xfer = tegra_i2c_xfer,
+ .probe_chip = tegra_i2c_probe_chip,
+ .set_bus_speed = tegra_i2c_set_bus_speed,
+};
- for (i = 0; i < TEGRA_I2C_NUM_CONTROLLERS; i++) {
- struct i2c_bus *bus = &i2c_controllers[i];
+static int tegra_i2c_child_pre_probe(struct udevice *dev)
+{
+ struct dm_i2c_chip *i2c_chip = dev_get_parentdata(dev);
- if (bus->inited && bus->is_dvc)
- return i;
- }
+ if (dev->of_offset == -1)
+ return 0;
+ return i2c_chip_ofdata_to_platdata(gd->fdt_blob, dev->of_offset,
+ i2c_chip);
+}
- return -1;
+static int tegra_i2c_ofdata_to_platdata(struct udevice *dev)
+{
+ return 0;
}
-/*
- * Register soft i2c adapters
- */
-U_BOOT_I2C_ADAP_COMPLETE(tegra0, tegra_i2c_init, tegra_i2c_probe,
- tegra_i2c_read, tegra_i2c_write,
- tegra_i2c_set_bus_speed, 100000, 0, 0)
-U_BOOT_I2C_ADAP_COMPLETE(tegra1, tegra_i2c_init, tegra_i2c_probe,
- tegra_i2c_read, tegra_i2c_write,
- tegra_i2c_set_bus_speed, 100000, 0, 1)
-U_BOOT_I2C_ADAP_COMPLETE(tegra2, tegra_i2c_init, tegra_i2c_probe,
- tegra_i2c_read, tegra_i2c_write,
- tegra_i2c_set_bus_speed, 100000, 0, 2)
-U_BOOT_I2C_ADAP_COMPLETE(tegra3, tegra_i2c_init, tegra_i2c_probe,
- tegra_i2c_read, tegra_i2c_write,
- tegra_i2c_set_bus_speed, 100000, 0, 3)
-#if TEGRA_I2C_NUM_CONTROLLERS > 4
-U_BOOT_I2C_ADAP_COMPLETE(tegra4, tegra_i2c_init, tegra_i2c_probe,
- tegra_i2c_read, tegra_i2c_write,
- tegra_i2c_set_bus_speed, 100000, 0, 4)
-#endif
+static const struct udevice_id tegra_i2c_ids[] = {
+ { .compatible = "nvidia,tegra114-i2c", .data = TYPE_114 },
+ { .compatible = "nvidia,tegra20-i2c", .data = TYPE_STD },
+ { .compatible = "nvidia,tegra20-i2c-dvc", .data = TYPE_DVC },
+ { }
+};
+
+U_BOOT_DRIVER(i2c_tegra) = {
+ .name = "i2c_tegra",
+ .id = UCLASS_I2C,
+ .of_match = tegra_i2c_ids,
+ .ofdata_to_platdata = tegra_i2c_ofdata_to_platdata,
+ .probe = tegra_i2c_probe,
+ .per_child_auto_alloc_size = sizeof(struct dm_i2c_chip),
+ .child_pre_probe = tegra_i2c_child_pre_probe,
+ .priv_auto_alloc_size = sizeof(struct i2c_bus),
+ .ops = &tegra_i2c_ops,
+};
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 2f2e48f..6fa836f 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -15,11 +15,15 @@ obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o
obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
obj-$(CONFIG_FSL_IIM) += fsl_iim.o
obj-$(CONFIG_GPIO_LED) += gpio_led.o
+obj-$(CONFIG_I2C_EEPROM) += i2c_eeprom.o
obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
obj-$(CONFIG_NS87308) += ns87308.o
obj-$(CONFIG_PDSP188x) += pdsp188x.o
+ifdef CONFIG_DM_I2C
+obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
+endif
obj-$(CONFIG_STATUS_LED) += status_led.o
obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c
new file mode 100644
index 0000000..d0548ec
--- /dev/null
+++ b/drivers/misc/i2c_eeprom.c
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <i2c.h>
+#include <i2c_eeprom.h>
+
+static int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t *buf,
+ int size)
+{
+ return -ENODEV;
+}
+
+static int i2c_eeprom_write(struct udevice *dev, int offset,
+ const uint8_t *buf, int size)
+{
+ return -ENODEV;
+}
+
+struct i2c_eeprom_ops i2c_eeprom_std_ops = {
+ .read = i2c_eeprom_read,
+ .write = i2c_eeprom_write,
+};
+
+int i2c_eeprom_std_probe(struct udevice *dev)
+{
+ return 0;
+}
+
+static const struct udevice_id i2c_eeprom_std_ids[] = {
+ { .compatible = "i2c-eeprom" },
+ { }
+};
+
+U_BOOT_DRIVER(i2c_eeprom_std) = {
+ .name = "i2c_eeprom",
+ .id = UCLASS_I2C_EEPROM,
+ .of_match = i2c_eeprom_std_ids,
+ .probe = i2c_eeprom_std_probe,
+ .priv_auto_alloc_size = sizeof(struct i2c_eeprom),
+ .ops = &i2c_eeprom_std_ops,
+};
+
+UCLASS_DRIVER(i2c_eeprom) = {
+ .id = UCLASS_I2C_EEPROM,
+ .name = "i2c_eeprom",
+};
diff --git a/drivers/misc/i2c_eeprom_emul.c b/drivers/misc/i2c_eeprom_emul.c
new file mode 100644
index 0000000..7343445
--- /dev/null
+++ b/drivers/misc/i2c_eeprom_emul.c
@@ -0,0 +1,168 @@
+/*
+ * Simulate an I2C eeprom
+ *
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <i2c.h>
+#include <malloc.h>
+#include <asm/test.h>
+
+#ifdef DEBUG
+#define debug_buffer print_buffer
+#else
+#define debug_buffer(x, ...)
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sandbox_i2c_flash_plat_data {
+ enum sandbox_i2c_eeprom_test_mode test_mode;
+ const char *filename;
+ int offset_len; /* Length of an offset in bytes */
+ int size; /* Size of data buffer */
+};
+
+struct sandbox_i2c_flash {
+ uint8_t *data;
+};
+
+void sandbox_i2c_eeprom_set_test_mode(struct udevice *dev,
+ enum sandbox_i2c_eeprom_test_mode mode)
+{
+ struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev);
+
+ plat->test_mode = mode;
+}
+
+void sandbox_i2c_eeprom_set_offset_len(struct udevice *dev, int offset_len)
+{
+ struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev);
+
+ plat->offset_len = offset_len;
+}
+
+static int sandbox_i2c_eeprom_xfer(struct udevice *emul, struct i2c_msg *msg,
+ int nmsgs)
+{
+ struct sandbox_i2c_flash *priv = dev_get_priv(emul);
+ uint offset = 0;
+
+ debug("\n%s\n", __func__);
+ debug_buffer(0, priv->data, 1, 16, 0);
+ for (; nmsgs > 0; nmsgs--, msg++) {
+ struct sandbox_i2c_flash_plat_data *plat =
+ dev_get_platdata(emul);
+ int len;
+ u8 *ptr;
+
+ if (!plat->size)
+ return -ENODEV;
+ if (msg->addr + msg->len > plat->size) {
+ debug("%s: Address %x, len %x is outside range 0..%x\n",
+ __func__, msg->addr, msg->len, plat->size);
+ return -EINVAL;
+ }
+ len = msg->len;
+ debug(" %s: msg->len=%d",
+ msg->flags & I2C_M_RD ? "read" : "write",
+ msg->len);
+ if (msg->flags & I2C_M_RD) {
+ if (plat->test_mode == SIE_TEST_MODE_SINGLE_BYTE)
+ len = 1;
+ debug(", offset %x, len %x: ", offset, len);
+ memcpy(msg->buf, priv->data + offset, len);
+ memset(msg->buf + len, '\xff', msg->len - len);
+ debug_buffer(0, msg->buf, 1, msg->len, 0);
+ } else if (len >= plat->offset_len) {
+ int i;
+
+ ptr = msg->buf;
+ for (i = 0; i < plat->offset_len; i++, len--)
+ offset = (offset << 8) | *ptr++;
+ debug(", set offset %x: ", offset);
+ debug_buffer(0, msg->buf, 1, msg->len, 0);
+ if (plat->test_mode == SIE_TEST_MODE_SINGLE_BYTE)
+ len = min(len, 1);
+
+ /* For testing, map offsets into our limited buffer */
+ for (i = 24; i > 0; i -= 8) {
+ if (offset > (1 << i)) {
+ offset = (offset >> i) |
+ (offset & ((1 << i) - 1));
+ offset += i;
+ }
+ }
+ memcpy(priv->data + offset, ptr, len);
+ }
+ }
+ debug_buffer(0, priv->data, 1, 16, 0);
+
+ return 0;
+}
+
+struct dm_i2c_ops sandbox_i2c_emul_ops = {
+ .xfer = sandbox_i2c_eeprom_xfer,
+};
+
+static int sandbox_i2c_eeprom_ofdata_to_platdata(struct udevice *dev)
+{
+ struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev);
+
+ plat->size = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+ "sandbox,size", 32);
+ plat->filename = fdt_getprop(gd->fdt_blob, dev->of_offset,
+ "sandbox,filename", NULL);
+ if (!plat->filename) {
+ debug("%s: No filename for device '%s'\n", __func__,
+ dev->name);
+ return -EINVAL;
+ }
+ plat->test_mode = SIE_TEST_MODE_NONE;
+ plat->offset_len = 1;
+
+ return 0;
+}
+
+static int sandbox_i2c_eeprom_probe(struct udevice *dev)
+{
+ struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev);
+ struct sandbox_i2c_flash *priv = dev_get_priv(dev);
+
+ priv->data = calloc(1, plat->size);
+ if (!priv->data)
+ return -ENOMEM;
+
+ return 0;
+}
+
+static int sandbox_i2c_eeprom_remove(struct udevice *dev)
+{
+ struct sandbox_i2c_flash *priv = dev_get_priv(dev);
+
+ free(priv->data);
+
+ return 0;
+}
+
+static const struct udevice_id sandbox_i2c_ids[] = {
+ { .compatible = "sandbox,i2c-eeprom" },
+ { }
+};
+
+U_BOOT_DRIVER(sandbox_i2c_emul) = {
+ .name = "sandbox_i2c_eeprom_emul",
+ .id = UCLASS_I2C_EMUL,
+ .of_match = sandbox_i2c_ids,
+ .ofdata_to_platdata = sandbox_i2c_eeprom_ofdata_to_platdata,
+ .probe = sandbox_i2c_eeprom_probe,
+ .remove = sandbox_i2c_eeprom_remove,
+ .priv_auto_alloc_size = sizeof(struct sandbox_i2c_flash),
+ .platdata_auto_alloc_size = sizeof(struct sandbox_i2c_flash_plat_data),
+ .ops = &sandbox_i2c_emul_ops,
+};
diff --git a/drivers/power/tps6586x.c b/drivers/power/tps6586x.c
index d29d969..29bab4c 100644
--- a/drivers/power/tps6586x.c
+++ b/drivers/power/tps6586x.c
@@ -10,9 +10,7 @@
#include <asm/io.h>
#include <i2c.h>
-static int bus_num; /* I2C bus we are on */
-#define I2C_ADDRESS 0x34 /* chip requires this address */
-static char inited; /* 1 if we have been inited */
+static struct udevice *tps6586x_dev;
enum {
/* Registers that we access */
@@ -37,13 +35,9 @@ static int tps6586x_read(int reg)
int i;
uchar data;
int retval = -1;
- int old_bus_num;
-
- old_bus_num = i2c_get_bus_num();
- i2c_set_bus_num(bus_num);
for (i = 0; i < MAX_I2C_RETRY; ++i) {
- if (!i2c_read(I2C_ADDRESS, reg, 1, &data, 1)) {
+ if (!i2c_read(tps6586x_dev, reg, &data, 1)) {
retval = (int)data;
goto exit;
}
@@ -53,7 +47,6 @@ static int tps6586x_read(int reg)
}
exit:
- i2c_set_bus_num(old_bus_num);
debug("pmu_read %x=%x\n", reg, retval);
if (retval < 0)
debug("%s: failed to read register %#x: %d\n", __func__, reg,
@@ -65,13 +58,9 @@ static int tps6586x_write(int reg, uchar *data, uint len)
{
int i;
int retval = -1;
- int old_bus_num;
-
- old_bus_num = i2c_get_bus_num();
- i2c_set_bus_num(bus_num);
for (i = 0; i < MAX_I2C_RETRY; ++i) {
- if (!i2c_write(I2C_ADDRESS, reg, 1, data, len)) {
+ if (!i2c_write(tps6586x_dev, reg, data, len)) {
retval = 0;
goto exit;
}
@@ -81,7 +70,6 @@ static int tps6586x_write(int reg, uchar *data, uint len)
}
exit:
- i2c_set_bus_num(old_bus_num);
debug("pmu_write %x=%x: ", reg, retval);
for (i = 0; i < len; i++)
debug("%x ", data[i]);
@@ -163,7 +151,7 @@ int tps6586x_set_pwm_mode(int mask)
uchar val;
int ret;
- assert(inited);
+ assert(tps6586x_dev);
ret = tps6586x_read(PFM_MODE);
if (ret != -1) {
val = (uchar)ret;
@@ -184,7 +172,7 @@ int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate,
int sm0, sm1;
int bad;
- assert(inited);
+ assert(tps6586x_dev);
/* get current voltage settings */
if (read_voltages(&sm0, &sm1)) {
@@ -255,10 +243,9 @@ int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate,
return bad ? -1 : 0;
}
-int tps6586x_init(int bus)
+int tps6586x_init(struct udevice *dev)
{
- bus_num = bus;
- inited = 1;
+ tps6586x_dev = dev;
return 0;
}
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index e1bf496..75eb6bd 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -348,6 +348,7 @@ U_BOOT_DRIVER(serial_pl01x) = {
.probe = pl01x_serial_probe,
.ops = &pl01x_serial_ops,
.flags = DM_FLAG_PRE_RELOC,
+ .priv_auto_alloc_size = sizeof(struct pl01x_priv),
};
#endif
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index d0dd29f..ba442d5 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -852,30 +852,6 @@ DEFINE_CACHE_ALIGN_BUFFER(u8, control_req, USB_BUFSIZ);
DEFINE_CACHE_ALIGN_BUFFER(u8, status_req, STATUS_BYTECOUNT);
#endif
-
-/**
- * strlcpy - Copy a %NUL terminated string into a sized buffer
- * @dest: Where to copy the string to
- * @src: Where to copy the string from
- * @size: size of destination buffer
- *
- * Compatible with *BSD: the result is always a valid
- * NUL-terminated string that fits in the buffer (unless,
- * of course, the buffer size is zero). It does not pad
- * out the result like strncpy() does.
- */
-size_t strlcpy(char *dest, const char *src, size_t size)
-{
- size_t ret = strlen(src);
-
- if (size) {
- size_t len = (ret >= size) ? size - 1 : ret;
- memcpy(dest, src, len);
- dest[len] = '\0';
- }
- return ret;
-}
-
/*============================================================================*/
/*