summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
authorTom Rini <trini@ti.com>2014-11-14 16:39:32 -0500
committerTom Rini <trini@ti.com>2014-11-14 16:39:32 -0500
commit2086e388d56cbb0e3737a6276f04f00f74bf6723 (patch)
tree280fe51e714f5124839d81e3e3a0a6967c9f81d3 /drivers
parent6393c43c18a1aadcdcdd8551826eef15f50353d5 (diff)
parent94b383e7d843efe2618535f01776921751dd756b (diff)
downloadu-boot-imx-2086e388d56cbb0e3737a6276f04f00f74bf6723.zip
u-boot-imx-2086e388d56cbb0e3737a6276f04f00f74bf6723.tar.gz
u-boot-imx-2086e388d56cbb0e3737a6276f04f00f74bf6723.tar.bz2
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/fm/memac.c12
-rw-r--r--drivers/net/fm/memac_phy.c7
2 files changed, 15 insertions, 4 deletions
diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c
index 9499290..60e898c 100644
--- a/drivers/net/fm/memac.c
+++ b/drivers/net/fm/memac.c
@@ -37,7 +37,8 @@ static void memac_enable_mac(struct fsl_enet_mac *mac)
{
struct memac *regs = mac->base;
- setbits_be32(&regs->command_config, MEMAC_CMD_CFG_RXTX_EN);
+ setbits_be32(&regs->command_config,
+ MEMAC_CMD_CFG_RXTX_EN | MEMAC_CMD_CFG_NO_LEN_CHK);
}
static void memac_disable_mac(struct fsl_enet_mac *mac)
@@ -93,11 +94,16 @@ static void memac_set_interface_mode(struct fsl_enet_mac *mac,
if_mode &= ~IF_MODE_MASK;
if_mode |= (IF_MODE_GMII);
break;
+ case PHY_INTERFACE_MODE_XGMII:
+ if_mode &= ~IF_MODE_MASK;
+ if_mode |= IF_MODE_XGMII;
+ break;
default:
break;
}
- /* Enable automatic speed selection */
- if_mode |= IF_MODE_EN_AUTO;
+ /* Enable automatic speed selection for Non-XGMII */
+ if (type != PHY_INTERFACE_MODE_XGMII)
+ if_mode |= IF_MODE_EN_AUTO;
if (type == PHY_INTERFACE_MODE_RGMII) {
if_mode &= ~IF_MODE_EN_AUTO;
diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c
index 5f910c2..a155d89 100644
--- a/drivers/net/fm/memac_phy.c
+++ b/drivers/net/fm/memac_phy.c
@@ -71,6 +71,8 @@ int memac_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr,
u32 c45 = 1;
if (dev_addr == MDIO_DEVAD_NONE) {
+ if (!strcmp(bus->name, DEFAULT_FM_TGEC_MDIO_NAME))
+ return 0xffff;
c45 = 0; /* clause 22 */
dev_addr = regnum & 0x1f;
clrbits_be32(&regs->mdio_stat, MDIO_STAT_ENC);
@@ -137,9 +139,12 @@ int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info)
* is zero, so MDIO clock is disabled.
* So, for proper functioning of MDIO, MDIO_CLK_DIV bits needs to
* be properly initialized.
+ * NEG bit default should be '1' as per FMAN-v3 RM, but on platform
+ * like T2080QDS, this bit default is '0', which leads to MDIO failure
+ * on XAUI PHY, so set this bit definitely.
*/
setbits_be32(&((struct memac_mdio_controller *)info->regs)->mdio_stat,
- MDIO_STAT_CLKDIV(258));
+ MDIO_STAT_CLKDIV(258) | MDIO_STAT_NEG);
return mdio_register(bus);
}