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authorAnton staaf <robotboy@chromium.org>2011-10-12 13:55:59 +0000
committerWolfgang Denk <wd@denx.de>2011-10-25 09:23:10 +0200
commit46a6d51c827a12723e7191128fb7aab42c8f5c09 (patch)
treedd006809b5a777f6bd463c2d8f3a7bad0426fb68 /doc
parentd47031e6879d6408b08889583600edd6aff378c8 (diff)
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cache: add ALLOC_CACHE_ALIGN_BUFFER macro
This macro is used to allocate cache line size aligned stack buffers for use with DMA hardware. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Aneesh V <aneesh@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'doc')
-rw-r--r--doc/README.arm-caches2
1 files changed, 2 insertions, 0 deletions
diff --git a/doc/README.arm-caches b/doc/README.arm-caches
index cd2b458..f6a52e3 100644
--- a/doc/README.arm-caches
+++ b/doc/README.arm-caches
@@ -40,6 +40,8 @@ Buffer Requirements:
- If the buffer is not cache-line aligned invalidation will be restricted
to the aligned part. That is, one cache-line at the respective boundary
may be left out while doing invalidation.
+- A suitable buffer can be alloced on the stack using the
+ ALLOC_CACHE_ALIGN_BUFFER macro.
Cleanup Before Linux:
- cleanup_before_linux() should flush the D-cache, invalidate I-cache, and