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author | Prabhakar Kushwaha <prabhakar@freescale.com> | 2015-06-02 10:55:52 +0530 |
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committer | York Sun <yorksun@freescale.com> | 2015-07-20 11:44:36 -0700 |
commit | 5c05508971ff9cd0a989f2013d8cd036c89f3e5c (patch) | |
tree | 89ea3f4c4f791792fd722e6738dc8b37550e995f /configs/cpu9G20_nand_128M_defconfig | |
parent | f299b5b0d244b7c4ef4820acb83fc562ff099413 (diff) | |
download | u-boot-imx-5c05508971ff9cd0a989f2013d8cd036c89f3e5c.zip u-boot-imx-5c05508971ff9cd0a989f2013d8cd036c89f3e5c.tar.gz u-boot-imx-5c05508971ff9cd0a989f2013d8cd036c89f3e5c.tar.bz2 |
armv8/fsl-lsch3: Support 256M mem split for MC & dbg-srvr
The agreed split of the top of memory is 256M for debug server and 256M
for MC. This patch implements the split.
In addition, the MC mem must be 512MB aligned, so the amount of memory
to hide must be 512MB to achieve that alignment.
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'configs/cpu9G20_nand_128M_defconfig')
0 files changed, 0 insertions, 0 deletions