diff options
| -rw-r--r-- | README | 15 | ||||
| -rw-r--r-- | board/freescale/ls2085a/ls2085a.c | 2 | ||||
| -rw-r--r-- | board/freescale/ls2085aqds/ls2085aqds.c | 2 | ||||
| -rw-r--r-- | board/freescale/ls2085ardb/ls2085ardb.c | 2 | ||||
| -rw-r--r-- | include/configs/ls2085a_common.h | 12 |
5 files changed, 27 insertions, 6 deletions
@@ -5063,6 +5063,21 @@ within that device. normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the virtual address in NOR flash. +Freescale Layerscape Debug Server Support: +------------------------------------------- +The Freescale Layerscape Debug Server Support supports the loading of +"Debug Server firmware" and triggering SP boot-rom. +This firmware often needs to be loaded during U-Boot booting. + +- CONFIG_FSL_DEBUG_SERVER + Enable the Debug Server for Layerscape SoCs. + +- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE + Define minimum DDR size required for debug server image + +- CONFIG_SYS_MEM_TOP_HIDE_MIN + Define minimum DDR size to be hided from top of the DDR memory + Building the Software: ====================== diff --git a/board/freescale/ls2085a/ls2085a.c b/board/freescale/ls2085a/ls2085a.c index e43dd4c..73c4410 100644 --- a/board/freescale/ls2085a/ls2085a.c +++ b/board/freescale/ls2085a/ls2085a.c @@ -80,7 +80,7 @@ unsigned long get_dram_size_to_hide(void) dram_to_hide += mc_get_dram_block_size(); #endif - return dram_to_hide; + return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN); } int board_eth_init(bd_t *bis) diff --git a/board/freescale/ls2085aqds/ls2085aqds.c b/board/freescale/ls2085aqds/ls2085aqds.c index 9b57799..c492c7e 100644 --- a/board/freescale/ls2085aqds/ls2085aqds.c +++ b/board/freescale/ls2085aqds/ls2085aqds.c @@ -215,7 +215,7 @@ unsigned long get_dram_size_to_hide(void) dram_to_hide += mc_get_dram_block_size(); #endif - return dram_to_hide; + return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN); } #ifdef CONFIG_FSL_MC_ENET diff --git a/board/freescale/ls2085ardb/ls2085ardb.c b/board/freescale/ls2085ardb/ls2085ardb.c index 15cb251..1f8cf8a 100644 --- a/board/freescale/ls2085ardb/ls2085ardb.c +++ b/board/freescale/ls2085ardb/ls2085ardb.c @@ -212,7 +212,7 @@ unsigned long get_dram_size_to_hide(void) dram_to_hide += mc_get_dram_block_size(); #endif - return dram_to_hide; + return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN); } #ifdef CONFIG_FSL_MC_ENET diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 1969696..1b4a35a 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -163,21 +163,27 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_NAND_BASE_PHYS 0x30000000 /* Debug Server firmware */ -#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) /* 2 sec timeout */ #define CONFIG_SYS_DEBUG_SERVER_TIMEOUT (2 * 1000 * 1000) /* MC firmware */ #define CONFIG_FSL_MC_ENET -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) /* TODO Actual DPL max length needs to be confirmed with the MC FW team */ #define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000 -/* Carve out a DDR region which will not be used by u-boot/Linux */ +/* + * Carve out a DDR region which will not be used by u-boot/Linux + * + * It will be used by MC and Debug Server. The MC region must be + * 512MB aligned, so the min size to hide is 512MB. + */ #if defined(CONFIG_FSL_MC_ENET) || defined(CONFIG_FSL_DEBUG_SERVER) +#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) +#define CONFIG_SYS_MEM_TOP_HIDE_MIN (512UL * 1024 * 1024) #define CONFIG_SYS_MEM_TOP_HIDE get_dram_size_to_hide() #endif |