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authorMichal Simek <michal.simek@xilinx.com>2016-08-15 09:41:36 +0200
committerMichal Simek <michal.simek@xilinx.com>2016-09-22 07:33:21 +0200
commit48255f52764b64f35a268e4e87f2c3a621741836 (patch)
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parentd58fc12eb7f40a208e22b57037436411ea36125c (diff)
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ARM64: zynqmp: Add support for USB ulpi phy reset via mode pins
Mode pins can be used as output for reset. Xilinx boards are using this feature as additional way how to reset USB phys and also others chips on the boards. Mode1 is used on all these boards for this feature. Let SPL toggle reset on this pin by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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