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authorNitin Garg <nitin.garg@freescale.com>2014-09-02 17:33:06 -0500
committerNitin Garg <nitin.garg@freescale.com>2014-09-04 10:37:37 -0500
commit69f56f7509a4116fa0f2b9be50db256f1e628d31 (patch)
tree9a1cac64f6629fd88d7b96e69bf3edc24eaac129 /boards.cfg
parentac62726276687242ce08ebe90ee765efb41abf3b (diff)
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ENGR00328278-1: Fix i.MX6DQ/DL arm2 LPDDR2 boards mem size
Couple of issues in commit 21a2eb5f. The RAM size is wrong and max number of DCD is 220. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Diffstat (limited to 'boards.cfg')
-rw-r--r--boards.cfg8
1 files changed, 4 insertions, 4 deletions
diff --git a/boards.cfg b/boards.cfg
index 6311e42..f5235ce 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -317,10 +317,10 @@ Active arm armv7 mx6 boundary nitrogen6x
Active arm armv7 mx6 boundary nitrogen6x nitrogen6s nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512 Eric Nelson <eric.nelson@boundarydevices.com>
Active arm armv7 mx6 boundary nitrogen6x nitrogen6s1g nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024 Eric Nelson <eric.nelson@boundarydevices.com>
Active arm armv7 mx6 congatec cgtqmx6eval cgtqmx6qeval cgtqmx6eval:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Leo Sartre <lsartre@adeneo-embedded.com>
-Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,DDR_MB=1024 Jason Liu <r64343@freescale.com>
-Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2_lpddr2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,MX6DQ_LPDDR2,DDR_MB=256 Jason Liu <r64343@freescale.com>
-Active arm armv7 mx6 freescale mx6qarm2 mx6dlarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,DDR_MB=1024 Jason Liu <r64343@freescale.com>
-Active arm armv7 mx6 freescale mx6qarm2 mx6dlarm2_lpddr2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,MX6DL_LPDDR2,DDR_MB=256 Jason Liu <r64343@freescale.com>
+Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,DDR_MB=2048 Jason Liu <r64343@freescale.com>
+Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2_lpddr2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,MX6DQ_LPDDR2,DDR_MB=512 Jason Liu <r64343@freescale.com>
+Active arm armv7 mx6 freescale mx6qarm2 mx6dlarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,DDR_MB=2048 Jason Liu <r64343@freescale.com>
+Active arm armv7 mx6 freescale mx6qarm2 mx6dlarm2_lpddr2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,MX6DL_LPDDR2,DDR_MB=512 Jason Liu <r64343@freescale.com>
Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048 Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 freescale mx6qsabreauto mx6dlsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048 Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 freescale mx6qsabreauto mx6solosabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_NOSMP="nosmp" Fabio Estevam <fabio.estevam@freescale.com>