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author | Nagabhushana Netagunte <nagabhushana.netagunte@ti.com> | 2011-09-03 22:21:04 -0400 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-09-04 11:36:19 +0200 |
commit | 0f3d6b06ea06e5b0295e4a8222a25bc95a70c026 (patch) | |
tree | 91a2566d7d9f01c2920e00042d77a7364e40fd28 /board/ti/beagle | |
parent | ba511f779a584f77b4b798fc40685bfe8d3d5163 (diff) | |
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da850: modifications for Logic PD Rev.3 AM18xx EVM
AHCLKR/UART1_RTS/GP0[11] pin needs to be configured for
NOR to work on Rev.3 EVM. When GP0[11] is low,
the SD0 interface will not work, but NOR flash will.
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'board/ti/beagle')
0 files changed, 0 insertions, 0 deletions