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authorPeng Fan <Peng.Fan@freescale.com>2015-04-29 10:52:52 +0800
committerPeng Fan <Peng.Fan@freescale.com>2015-04-29 15:10:57 +0800
commitdd842f32b6d8d770e844790643ece352f92b8c5e (patch)
tree976176297a3cf2b160bf73632e0a88e86c227852 /board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
parentb7f3f9a6100519c784085ea9f6e575162555fb42 (diff)
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MLK-10774-53 imx: update setting pmic volatage
We should not rely on pfuze_common_init to set the voltage, may be we should remove the voltage settings in pfuze_common_init. This patch is to setting the voltages in power_init_board. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Diffstat (limited to 'board/freescale/mx6sxsabreauto/mx6sxsabreauto.c')
-rw-r--r--board/freescale/mx6sxsabreauto/mx6sxsabreauto.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
index 6a026d4..6019dde 100644
--- a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
+++ b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
@@ -132,12 +132,30 @@ int power_init_board(void)
if (ret < 0)
return ret;
+ /* set SW1AB standby volatage 0.975V */
+ pmic_reg_read(pfuze, PFUZE100_SW1ABSTBY, &reg);
+ reg &= ~0x3f;
+ reg |= PFUZE100_SW1ABC_SETP(9750);
+ pmic_reg_write(pfuze, PFUZE100_SW1ABSTBY, reg);
+
+ /* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
+ pmic_reg_read(pfuze, PFUZE100_SW1ABCONF, &reg);
+ reg &= ~0xc0;
+ reg |= 0x40;
+ pmic_reg_write(pfuze, PFUZE100_SW1ABCONF, reg);
+
/* set SW1C standby volatage 1.10V */
pmic_reg_read(pfuze, PFUZE100_SW1CSTBY, &reg);
reg &= ~0x3f;
reg |= PFUZE100_SW1ABC_SETP(11000);
pmic_reg_write(pfuze, PFUZE100_SW1CSTBY, reg);
+ /* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */
+ pmic_reg_read(pfuze, PFUZE100_SW1CCONF, &reg);
+ reg &= ~0xc0;
+ reg |= 0x40;
+ pmic_reg_write(pfuze, PFUZE100_SW1CCONF, reg);
+
/* Enable power of VGEN5 3V3, needed for SD3 */
pmic_reg_read(pfuze, PFUZE100_VGEN5VOL, &reg);
reg &= ~LDO_VOL_MASK;