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authorLily Zhang <r58066@freescale.com>2009-12-28 18:40:33 +0800
committerLily Zhang <r58066@freescale.com>2009-12-28 20:30:11 +0800
commitfaab46cc860ba9e89290dd4931bca866cb269a75 (patch)
tree1d9090a11753c8dd72edef5f0ffea3bd1cf787a5 /board/freescale/mx51_bbg
parenta7fc31a95a55983ddd0015d3778e0fe1c2d220dc (diff)
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ENGR00119701 MX51: merge some fixes in 200908 version
1. Update MX51 3-stack initialization codes to merge some fixes from 200901 version 2. Update MX51 BBG code to add chip version check Signed-off-by: Lily Zhang <r58066@freescale.com>
Diffstat (limited to 'board/freescale/mx51_bbg')
-rw-r--r--board/freescale/mx51_bbg/lowlevel_init.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/board/freescale/mx51_bbg/lowlevel_init.S b/board/freescale/mx51_bbg/lowlevel_init.S
index cad0f1c..07ec55c 100644
--- a/board/freescale/mx51_bbg/lowlevel_init.S
+++ b/board/freescale/mx51_bbg/lowlevel_init.S
@@ -48,6 +48,8 @@
orr r0, r0, #(1 << 23) /* disable write allocate combine */
orr r0, r0, #(1 << 22) /* disable write allocate */
+ ldr r1, =0x00000000
+ ldr r3, [r1, #ROM_SI_REV]
cmp r3, #0x10 /* r3 contains the silicon rev */
orrls r0, r0, #(1 << 25) /* disable write combine for TO 2 and lower revs */