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author | Bill Cook <cook@isgchips.com> | 2011-05-25 15:51:07 -0400 |
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committer | Kim Phillips <kim.phillips@freescale.com> | 2011-07-06 19:09:28 -0500 |
commit | 810cb19003ffe0115d10700fc512a2a743916f20 (patch) | |
tree | 326ec25ea3eb481b753b05d9a991fe3ef1e6fdb0 /board/freescale/corenet_ds | |
parent | f5f30dea2a133e5393eef306c43eb173ff0e9fc2 (diff) | |
download | u-boot-imx-810cb19003ffe0115d10700fc512a2a743916f20.zip u-boot-imx-810cb19003ffe0115d10700fc512a2a743916f20.tar.gz u-boot-imx-810cb19003ffe0115d10700fc512a2a743916f20.tar.bz2 |
MPC83XX: Fix PCI express clock setup
On a 8308 based board it was found that the PEX_GLK_RATIO register
(programmed in arch/powerpc/cpu/mpc83xx/pcie.c) was getting set to 0, This
was tracked to the fact that the pci express clock frequency was not being
assigned to the pciexp1_clk entry in the global data structure in file
arch/powerpc/cpu/mpc83xx/speed.c. Fix this and a similiar issue in
'do_clocks' command.
Signed-off-by: Bill Cook <cook@isgchips.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/freescale/corenet_ds')
0 files changed, 0 insertions, 0 deletions