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author | Simon Glass <sjg@chromium.org> | 2015-01-27 22:13:33 -0700 |
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committer | Simon Glass <sjg@chromium.org> | 2015-02-05 22:16:43 -0700 |
commit | 2d934e5703b712686c3ec67f6d5eeb137c68805d (patch) | |
tree | 31052345a6556760420f3c5435eae749d359e255 /arch/x86/cpu/ivybridge | |
parent | eea0f11278d9104960dfb1fbfcddfb796a3e0bb5 (diff) | |
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x86: Rename MMCONF_BASE_ADDRESS and make it common across x86
This setting will be used by more than just ivybridge so make it common.
Also rename it to PCIE_ECAM_BASE which is a more descriptive name.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/ivybridge')
-rw-r--r-- | arch/x86/cpu/ivybridge/sdram.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c index 4963448..766b385 100644 --- a/arch/x86/cpu/ivybridge/sdram.c +++ b/arch/x86/cpu/ivybridge/sdram.c @@ -757,7 +757,7 @@ int dram_init(void) .mchbar = DEFAULT_MCHBAR, .dmibar = DEFAULT_DMIBAR, .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, + .pciexbar = CONFIG_PCIE_ECAM_BASE, .smbusbar = SMBUS_IO_BASE, .wdbbar = 0x4000000, .wdbsize = 0x1000, |