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authorSimon Glass <sjg@chromium.org>2016-01-21 19:45:12 -0700
committerSimon Glass <sjg@chromium.org>2016-01-21 20:42:37 -0700
commitaffd4a9fa0c4f84758b2d2cdf801256f2c566bbc (patch)
tree5b45afbf5cc9dd87a41e5b67d5c8ab1015749f83 /arch/arm
parent2460d18c3383b7b024566dd60bf6a725ae37a661 (diff)
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rockchip: Tidy up the register-access macros
These work reasonable well, but there are a few errors: - Brackets should be used to avoid unexpected side-effects - When setting bits, the corresponding upper 16 bits should be set also Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/arch-rockchip/hardware.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/hardware.h b/arch/arm/include/asm/arch-rockchip/hardware.h
index d5af5b8..08a66ef 100644
--- a/arch/arm/include/asm/arch-rockchip/hardware.h
+++ b/arch/arm/include/asm/arch-rockchip/hardware.h
@@ -7,14 +7,15 @@
#ifndef _ASM_ARCH_HARDWARE_H
#define _ASM_ARCH_HARDWARE_H
-#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | set)
+#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | (set))
#define RK_SETBITS(set) RK_CLRSETBITS(0, set)
#define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0)
#define TIMER7_BASE 0xff810020
-#define rk_clrsetreg(addr, clr, set) writel((clr) << 16 | (set), addr)
+#define rk_clrsetreg(addr, clr, set) \
+ writel(((clr) | (set)) << 16 | (set), addr)
#define rk_clrreg(addr, clr) writel((clr) << 16, addr)
-#define rk_setreg(addr, set) writel(set, addr)
+#define rk_setreg(addr, set) writel((set) << 16 | (set), addr)
#endif