From affd4a9fa0c4f84758b2d2cdf801256f2c566bbc Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 21 Jan 2016 19:45:12 -0700 Subject: rockchip: Tidy up the register-access macros These work reasonable well, but there are a few errors: - Brackets should be used to avoid unexpected side-effects - When setting bits, the corresponding upper 16 bits should be set also Signed-off-by: Simon Glass --- arch/arm/include/asm/arch-rockchip/hardware.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/arch-rockchip/hardware.h b/arch/arm/include/asm/arch-rockchip/hardware.h index d5af5b8..08a66ef 100644 --- a/arch/arm/include/asm/arch-rockchip/hardware.h +++ b/arch/arm/include/asm/arch-rockchip/hardware.h @@ -7,14 +7,15 @@ #ifndef _ASM_ARCH_HARDWARE_H #define _ASM_ARCH_HARDWARE_H -#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | set) +#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | (set)) #define RK_SETBITS(set) RK_CLRSETBITS(0, set) #define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0) #define TIMER7_BASE 0xff810020 -#define rk_clrsetreg(addr, clr, set) writel((clr) << 16 | (set), addr) +#define rk_clrsetreg(addr, clr, set) \ + writel(((clr) | (set)) << 16 | (set), addr) #define rk_clrreg(addr, clr) writel((clr) << 16, addr) -#define rk_setreg(addr, set) writel(set, addr) +#define rk_setreg(addr, set) writel((set) << 16 | (set), addr) #endif -- cgit v1.1