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author | Roger Quadros <rogerq@ti.com> | 2016-05-23 17:37:49 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2016-06-02 21:42:15 -0400 |
commit | 3599774eec9d06812c6124bcd0b34cebd7ec5e1c (patch) | |
tree | 475a278e6688afecece9a97d0d748f1c33d927b7 /arch/arm/include | |
parent | 55efadde7edee407a14c7cbf418c82b30a94faa8 (diff) | |
download | u-boot-imx-3599774eec9d06812c6124bcd0b34cebd7ec5e1c.zip u-boot-imx-3599774eec9d06812c6124bcd0b34cebd7ec5e1c.tar.gz u-boot-imx-3599774eec9d06812c6124bcd0b34cebd7ec5e1c.tar.bz2 |
dra7xx: Enable USB_PHY3 32KHz clock
DRA7xx has a 32KHz PHY clock for USB_PHY3 that must be enabled
for USB1 instance in Super-Speed.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/omap_common.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index ac34b0e..07f3848 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -145,6 +145,7 @@ struct prcm_regs { u32 cm_ssc_modfreqdiv_dpll_unipro; u32 cm_coreaon_usb_phy1_core_clkctrl; u32 cm_coreaon_usb_phy2_core_clkctrl; + u32 cm_coreaon_usb_phy3_core_clkctrl; u32 cm_coreaon_l3init_60m_gfclk_clkctrl; /* cm2.core */ |