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| author | Peng Fan <Peng.Fan@freescale.com> | 2015-08-17 16:11:01 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2015-09-02 15:34:12 +0200 |
| commit | 775d591f5d6e9266642c89d731b22263fc07e1c6 (patch) | |
| tree | 2a875c3e4c1ae5b70bbdd4944326727fb9bb433d /arch/arm/dts/socfpga_cyclone5_socrates.dts | |
| parent | 1b811e285c257a9f9545b9f0efad423541bb89e1 (diff) | |
| download | u-boot-imx-775d591f5d6e9266642c89d731b22263fc07e1c6.zip u-boot-imx-775d591f5d6e9266642c89d731b22263fc07e1c6.tar.gz u-boot-imx-775d591f5d6e9266642c89d731b22263fc07e1c6.tar.bz2 | |
imx: mx6: ddr add mpzqlp2ctl entry
Add mpzqlp2ctl entry for mx6_mmdc_calibration.
MMDC_MPZQLP2CTL register is for init tZQINIT, tZQCL, tZQCS for LPDDR2 chips.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Diffstat (limited to 'arch/arm/dts/socfpga_cyclone5_socrates.dts')
0 files changed, 0 insertions, 0 deletions