ENGR00176834-1 - [imx6] : add fsl_system_rev to check chip and board.

- Add fsl_system_rev to distinguish chip ID and board reversion.
- Add some api:
  mx6_chip_is_dq()
  mx6_chip_is_dl()
  mx6_chip_is_solo()
  mx6_chip_is_sololite()

  mx6_board_is_reva()
  mx6_board_is_revb()
  mx6_board_is_revc()

Signed-off-by: Fugang Duan <B38611@freescale.com>

3 files changed, 136 insertions, 1 deletions

diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 3b44939..708bb7e 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -29,6 +29,7 @@ endif
 
 LIB	= $(obj)lib$(VENDOR).a
 
+COBJS-${CONFIG_MXC}		+= fsl_sys_rev.o
 COBJS-${CONFIG_FSL_CADMUS}	+= cadmus.o
 COBJS-${CONFIG_FSL_VIA}		+= cds_via.o
 COBJS-${CONFIG_FSL_DIU_FB}	+= fsl_diu_fb.o fsl_logo_bmp.o
diff --git a/board/freescale/common/fsl_sys_rev.c b/board/freescale/common/fsl_sys_rev.c
new file mode 100644
index 0000000..9fdabac
--- /dev/null
+++ b/board/freescale/common/fsl_sys_rev.c
@@ -0,0 +1,115 @@
+/*
+ * Freescale system chip & board version define
+ * Copyright (C) 2012 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/mx6.h>
+
+#ifdef CONFIG_CMD_IMXOTP
+#include <imx_otp.h>
+#endif
+
+unsigned int fsl_system_rev;
+
+#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) || defined(CONFIG_MX6SOLO)
+/*
+ * Set fsl_system_rev:
+ * bit 0-7: Chip Revision ID
+ * bit 8-11: Board Revision ID
+ *     0: Unknown or latest revision
+ *     1: RevA Board
+ *     2: RevB board
+ *     3: RevC board
+ * bit 12-19: Chip Silicon ID
+ *     0x63: i.MX6 Dual/Quad
+ *     0x61: i.MX6 Solo/DualLite
+ *     0x60: i.MX6 SoloLite
+ */
+void fsl_set_system_rev(void)
+{
+	/* Read Silicon information from Anatop register */
+	/* The register layout:
+	 * bit 16-23: Chip Silicon ID
+	 * 0x60: i.MX6 SoloLite
+	 * 0x61: i.MX6 Solo/DualLite
+	 * 0x63: i.MX6 Dual/Quad
+	 *
+	 * bit 0-7: Chip Revision ID
+	 * 0x00: TO1.0
+	 * 0x01: TO1.1
+	 * 0x02: TO1.2
+	 *
+	 * exp:
+	 * Chip             Major    Minor
+	 * i.MX6Q1.0:       6300     00
+	 * i.MX6Q1.1:       6300     01
+	 * i.MX6Solo1.0:    6100     00
+	 */
+	u32 cpu_type = readl(ANATOP_BASE_ADDR + 0x260);
+	u32 board_type = 0;
+	/* Chip Silicon ID */
+	fsl_system_rev = (cpu_type >> 4) & 0xFF000;
+	/* Chip Revision ID */
+	fsl_system_rev |= (cpu_type & 0xFF);
+
+	/* Get Board ID information from OCOTP_GP1[15:8]
+	 * bit 12-15: Board type
+	 * 0x0 : Unknown
+	 * 0x1 : Sabre-AI (ARD)
+	 * 0x2 : Smart Device (SD)
+	 * 0x3 : Quick-Start Board (QSB)
+	 * 0x4 : SoloLite EVK (SL-EVK)
+	 *
+	 * bit 8-11: Board Revision ID
+	 * 0x0 : Unknown or latest revision
+	 * 0x1 : RevA board
+	 * 0x2 : RevB
+	 * 0x3 : RevC
+	 *
+	 * exp:
+	 * i.MX6Q ARD RevA:     0x11
+	 * i.MX6Q ARD RevB:     0x12
+	 * i.MX6Solo ARD RevA:  0x11
+	 * i.MX6Solo ARD RevB:  0x12
+	 */
+#ifdef CONFIG_CMD_IMXOTP
+	imx_otp_read_one_u32(0x26, &board_type);
+	switch ((board_type >> 8) & 0xF) {
+	case 0x1: /* RevA */
+		fsl_system_rev |= BOARD_REV_2;
+		break;
+	case 0x2: /* RevB */
+		fsl_system_rev |= BOARD_REV_3;
+		break;
+	case 0x3: /* RevC */
+		fsl_system_rev |= BOARD_REV_4;
+		break;
+	case 0x0: /* Unknown */
+	default:
+		fsl_system_rev |= BOARD_REV_1;
+		break;
+	}
+#endif
+}
+#else
+void fsl_set_system_rev(void)
+{
+}
+#endif
diff --git a/include/asm-arm/arch-mx6/mx6.h b/include/asm-arm/arch-mx6/mx6.h
index c87f4cc..5d7a07f 100644
--- a/include/asm-arm/arch-mx6/mx6.h
+++ b/include/asm-arm/arch-mx6/mx6.h
@@ -611,6 +611,11 @@
 #define ANATOP_USB1				0x10
 #define ANATOP_USB2				0x20
 
+#define CHIP_TYPE_DQ		0x63000
+#define CHIP_TYPE_DL		0x61000
+#define CHIP_TYPE_SOLO		0x61000
+#define CHIP_TYPE_SOLOLITE	0x60000
+
 #define CHIP_REV_1_0            0x10
 #define CHIP_REV_2_0            0x20
 #define CHIP_REV_2_1            0x21
@@ -628,7 +633,19 @@
 #define SRC_GPR10		0x44
 
 /* Get Board ID */
-#define board_is_rev(system_rev, rev)       (((system_rev & 0x0F00) == rev) ? 1 : 0)
+#define board_is_rev(system_rev, rev) (((system_rev & 0x0F00) == rev) ? 1 : 0)
+#define chip_is_type(system_rev, rev) \
+	(((system_rev & 0xFF000) == rev) ? 1 : 0)
+
+#define mx6_board_is_unknown()  board_is_rev(fsl_system_rev, BOARD_REV_1)
+#define mx6_board_is_reva()	board_is_rev(fsl_system_rev, BOARD_REV_2)
+#define mx6_board_is_revb()	board_is_rev(fsl_system_rev, BOARD_REV_3)
+#define mx6_board_is_revc()     board_is_rev(fsl_system_rev, BOARD_REV_4)
+
+#define mx6_chip_is_dq()	chip_is_type(fsl_system_rev, CHIP_TYPE_DQ)
+#define mx6_chip_is_dl()	chip_is_type(fsl_system_rev, CHIP_TYPE_DL)
+#define mx6_chip_is_solo()      chip_is_type(fsl_system_rev, CHIP_TYPE_SOLO)
+#define mx6_chip_is_sololite()	chip_is_type(fsl_system_rev, CHIP_TYPE_SOLOLITE)
 
 #ifndef __ASSEMBLER__
 
@@ -680,10 +697,12 @@ enum mxc_peri_clocks {
 	MXC_SPI2_CLK,
 };
 
+extern unsigned int fsl_system_rev;
 extern unsigned int mxc_get_clock(enum mxc_clock clk);
 extern unsigned int get_board_rev(void);
 extern int is_soc_rev(int rev);
 extern enum boot_device get_boot_device(void);
+extern void fsl_set_system_rev(void);
 
 #endif /* __ASSEMBLER__*/