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/*
* Copyright (c) 2013-2016, NVIDIA CORPORATION.
*
* SPDX-License-Identifier: GPL-2.0
*/
#ifndef _P2771_0000_H
#define _P2771_0000_H
#include <linux/sizes.h>
#include "tegra186-common.h"
/* High-level configuration options */
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2771-0000"
/* SD/MMC */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_TEGRA_MMC
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
#include "tegra-common-post.h"
/* Crystal is 38.4MHz. clk_m runs at half that rate */
#define COUNTER_FREQUENCY 19200000
#endif
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