blob: a3dd74a4a254d9f93535e595425f0b1f53d56e8d (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
|
/*
* Copyright (C) 2012 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6Q SabreSD board.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __MX6QSABRESD_CONFIG_H
#define __MX6QSABRESD_CONFIG_H
#include <asm/arch/imx-regs.h>
#include <asm/imx-common/gpio.h>
#define CONFIG_MACH_TYPE 3980
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONSOLE_DEV "ttymxc0"
#define CONFIG_MMCROOT "/dev/mmcblk1p2"
#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb"
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
#include "mx6sabre_common.h"
#define CONFIG_SYS_FSL_USDHC_NUM 3
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
#endif
/* Framebuffer */
#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_IMX_HDMI
#endif /* __MX6QSABRESD_CONFIG_H */
|
