1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
|
/*
* (C) Copyright 2004
* Texas Instruments.
* Richard Woodruff <r-woodruff2@ti.com>
* Kshitij Gupta <kshitij@ti.com>
*
* Configuration settings for the phyCORE-i.MX31 board.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <asm/arch/imx-regs.h>
/* High Level Configuration Options */
#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
#define CONFIG_MX31 /* in a mx31 */
#define CONFIG_MX31_CLK32 32000
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 512 * 1024)
/*
* Hardware drivers
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
/***********************************************************
* Command definition
***********************************************************/
#include <config_cmd_default.h>
#define CONFIG_CMD_PING
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_I2C
#define CONFIG_BOOTDELAY 3
#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro," \
"1536k(kernel),-(root)"
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 192.168.23.168
#define CONFIG_SERVERIP 192.168.23.2
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
"bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \
"ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
"bootargs_flash=setenv bootargs $(bootargs) " \
"root=/dev/mtdblock2 rootfstype=jffs2\0" \
"bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0" \
"bootcmd=run bootcmd_net\0" \
"bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs;" \
"tftpboot 0x80000000 $(uimage);bootm\0" \
"bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash;" \
"bootm 0x80000000\0" \
"unlock=yes\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
"prg_uboot=tftpboot 0x80000000 $(uboot);" \
"protect off 0xa0000000 +0x20000;" \
"erase 0xa0000000 +0x20000;" \
"cp.b 0x80000000 0xa0000000 $(filesize)\0" \
"prg_kernel=tftpboot 0x80000000 $(uimage);" \
"erase 0xa0040000 +0x180000;" \
"cp.b 0x80000000 0xa0040000 $(filesize)\0" \
"prg_jffs2=tftpboot 0x80000000 $(jffs2);" \
"erase 0xa01c0000 0xa1ffffff;" \
"cp.b 0x80000000 0xa01c0000 $(filesize)\0" \
"videomode=video=ctfb:x:240,y:320,depth:16,mode:0," \
"pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1," \
"sync:1241513985,vmode:0\0"
#define CONFIG_SMC911X
#define CONFIG_SMC911X_BASE 0xa8000000
#define CONFIG_SMC911X_32_BIT
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "uboot> "
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE 256
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
/* max number of command args */
#define CONFIG_SYS_MAXARGS 16
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x10000
#define CONFIG_SYS_LOAD_ADDR 0 /* default load address */
#define CONFIG_CMDLINE_EDITING
/*
* Physical Memory Map
*/
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SYS_TEXT_BASE 0xA0000000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_GBL_DATA_OFFSET)
/*
* FLASH and environment organization
*/
#define CONFIG_SYS_FLASH_BASE 0xa0000000
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 259 /* max # of sectors/chip */
/* Monitor at beginning of flash */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
#define CONFIG_ENV_IS_IN_EEPROM
#define CONFIG_ENV_OFFSET 0x00 /* env. starts here */
#define CONFIG_ENV_SIZE 4096
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10 ms delay */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* byte addr. lenght */
/*
* CFI FLASH driver setup
*/
#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/mtd/cfi_flash.c */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffered writes (~10x faster) */
#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
/*
* Timeout for Flash Erase and Flash Write
* timeout values are in ticks
*/
#define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ)
#define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ)
/*
* JFFS2 partitions
*/
#undef CONFIG_CMD_MTDPARTS
#define CONFIG_JFFS2_DEV "nor0"
/* EET platform additions */
#ifdef CONFIG_IMX31_PHYCORE_EET
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_MXC_GPIO
#define CONFIG_HARD_SPI
#define CONFIG_MXC_SPI
#define CONFIG_CMD_SPI
#define CONFIG_S6E63D6
#define CONFIG_VIDEO
#define CONFIG_CFB_CONSOLE
#define CONFIG_VIDEO_MX3
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_SW_CURSOR
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SPLASH_SCREEN
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#endif
#endif /* __CONFIG_H */
|
