blob: c42b0bcf0edcd88923e00f389bef9f92d7ccb24f (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
|
menu "Reset Controller Support"
config DM_RESET
bool "Enable reset controllers using Driver Model"
depends on DM && OF_CONTROL
help
Enable support for the reset controller driver class. Many hardware
modules are equipped with a reset signal, typically driven by some
reset controller hardware module within the chip. In U-Boot, reset
controller drivers allow control over these reset signals. In some
cases this API is applicable to chips outside the CPU as well,
although driving such reset isgnals using GPIOs may be more
appropriate in this case.
config SANDBOX_RESET
bool "Enable the sandbox reset test driver"
depends on DM_MAILBOX && SANDBOX
help
Enable support for a test reset controller implementation, which
simply accepts requests to reset various HW modules without actually
doing anything beyond a little error checking.
config TEGRA_CAR_RESET
bool "Enable Tegra CAR-based reset driver"
depends on TEGRA_CAR
help
Enable support for manipulating Tegra's on-SoC reset signals via
direct register access to the Tegra CAR (Clock And Reset controller).
config TEGRA186_RESET
bool "Enable Tegra186 BPMP-based reset driver"
depends on TEGRA186_BPMP
help
Enable support for manipulating Tegra's on-SoC reset signals via IPC
requests to the BPMP (Boot and Power Management Processor).
config RESET_UNIPHIER
bool "Reset controller driver for UniPhier SoCs"
depends on ARCH_UNIPHIER
default y
help
Support for reset controllers on UniPhier SoCs.
Say Y if you want to control reset signals provided by System Control
block, Media I/O block, Peripheral Block.
endmenu
|
