1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
|
/*
* Take linux kernel driver drivers/gpio/gpio-pca953x.c for reference.
*
* Copyright (C) 2016 Peng Fan <van.freenix@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
*/
/*
* Note:
* The driver's compatible table is borrowed from Linux Kernel,
* but now max supported gpio pins is 24 and only PCA953X_TYPE
* is supported. PCA957X_TYPE is not supported now.
* Also the Polarity Inversion feature is not supported now.
*
* TODO:
* 1. Support PCA957X_TYPE
* 2. Support 24 gpio pins
* 3. Support Polarity Inversion
*/
#include <common.h>
#include <errno.h>
#include <dm.h>
#include <fdtdec.h>
#include <i2c.h>
#include <malloc.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <dt-bindings/gpio/gpio.h>
#define PCA953X_INPUT 0
#define PCA953X_OUTPUT 1
#define PCA953X_INVERT 2
#define PCA953X_DIRECTION 3
#define PCA_GPIO_MASK 0x00FF
#define PCA_INT 0x0100
#define PCA953X_TYPE 0x1000
#define PCA957X_TYPE 0x2000
#define PCA_TYPE_MASK 0xF000
#define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
enum {
PCA953X_DIRECTION_IN,
PCA953X_DIRECTION_OUT,
};
#define MAX_BANK 5
#define BANK_SZ 8
DECLARE_GLOBAL_DATA_PTR;
/*
* struct pca953x_info - Data for pca953x
*
* @dev: udevice structure for the device
* @addr: i2c slave address
* @invert: Polarity inversion or not
* @gpio_count: the number of gpio pins that the device supports
* @chip_type: indicate the chip type,PCA953X or PCA957X
* @bank_count: the number of banks that the device supports
* @reg_output: array to hold the value of output registers
* @reg_direction: array to hold the value of direction registers
*/
struct pca953x_info {
struct udevice *dev;
int addr;
int invert;
int gpio_count;
int chip_type;
int bank_count;
u8 reg_output[MAX_BANK];
u8 reg_direction[MAX_BANK];
};
static int pca953x_write_single(struct udevice *dev, int reg, u8 val,
int offset)
{
struct pca953x_info *info = dev_get_platdata(dev);
int bank_shift = fls((info->gpio_count - 1) / BANK_SZ);
int off = offset / BANK_SZ;
int ret = 0;
ret = dm_i2c_write(dev, (reg << bank_shift) + off, &val, 1);
if (ret) {
dev_err(dev, "%s error\n", __func__);
return ret;
}
return 0;
}
static int pca953x_read_single(struct udevice *dev, int reg, u8 *val,
int offset)
{
struct pca953x_info *info = dev_get_platdata(dev);
int bank_shift = fls((info->gpio_count - 1) / BANK_SZ);
int off = offset / BANK_SZ;
int ret;
u8 byte;
ret = dm_i2c_read(dev, (reg << bank_shift) + off, &byte, 1);
if (ret) {
dev_err(dev, "%s error\n", __func__);
return ret;
}
*val = byte;
return 0;
}
static int pca953x_read_regs(struct udevice *dev, int reg, u8 *val)
{
struct pca953x_info *info = dev_get_platdata(dev);
int ret = 0;
if (info->gpio_count <= 8) {
ret = dm_i2c_read(dev, reg, val, 1);
} else if (info->gpio_count <= 16) {
ret = dm_i2c_read(dev, reg << 1, val, info->bank_count);
} else if (info->gpio_count == 40) {
/* Auto increment */
ret = dm_i2c_read(dev, (reg << 3) | 0x80, val, info->bank_count);
} else {
dev_err(dev, "Unsupported now\n");
return -EINVAL;
}
return ret;
}
static int pca953x_is_output(struct udevice *dev, int offset)
{
struct pca953x_info *info = dev_get_platdata(dev);
int bank = offset / BANK_SZ;
int off = offset % BANK_SZ;
/*0: output; 1: input */
return !(info->reg_direction[bank] & (1 << off));
}
static int pca953x_get_value(struct udevice *dev, unsigned offset)
{
int ret;
u8 val = 0;
int off = offset % BANK_SZ;
ret = pca953x_read_single(dev, PCA953X_INPUT, &val, offset);
if (ret)
return ret;
return (val >> off) & 0x1;
}
static int pca953x_set_value(struct udevice *dev, unsigned offset,
int value)
{
struct pca953x_info *info = dev_get_platdata(dev);
int bank = offset / BANK_SZ;
int off = offset % BANK_SZ;
u8 val;
int ret;
if (value)
val = info->reg_output[bank] | (1 << off);
else
val = info->reg_output[bank] & ~(1 << off);
ret = pca953x_write_single(dev, PCA953X_OUTPUT, val, offset);
if (ret)
return ret;
info->reg_output[bank] = val;
return 0;
}
static int pca953x_set_direction(struct udevice *dev, unsigned offset, int dir)
{
struct pca953x_info *info = dev_get_platdata(dev);
int bank = offset / BANK_SZ;
int off = offset % BANK_SZ;
u8 val;
int ret;
if (dir == PCA953X_DIRECTION_IN)
val = info->reg_direction[bank] | (1 << off);
else
val = info->reg_direction[bank] & ~(1 << off);
ret = pca953x_write_single(dev, PCA953X_DIRECTION, val, offset);
if (ret)
return ret;
info->reg_direction[bank] = val;
return 0;
}
static int pca953x_direction_input(struct udevice *dev, unsigned offset)
{
return pca953x_set_direction(dev, offset, PCA953X_DIRECTION_IN);
}
static int pca953x_direction_output(struct udevice *dev, unsigned offset,
int value)
{
/* Configure output value. */
pca953x_set_value(dev, offset, value);
/* Configure direction as output. */
pca953x_set_direction(dev, offset, PCA953X_DIRECTION_OUT);
return 0;
}
static int pca953x_get_function(struct udevice *dev, unsigned offset)
{
if (pca953x_is_output(dev, offset))
return GPIOF_OUTPUT;
else
return GPIOF_INPUT;
}
static int pca953x_xlate(struct udevice *dev, struct gpio_desc *desc,
struct fdtdec_phandle_args *args)
{
desc->offset = args->args[0];
desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
return 0;
}
static const struct dm_gpio_ops pca953x_ops = {
.direction_input = pca953x_direction_input,
.direction_output = pca953x_direction_output,
.get_value = pca953x_get_value,
.set_value = pca953x_set_value,
.get_function = pca953x_get_function,
.xlate = pca953x_xlate,
};
static int pca953x_probe(struct udevice *dev)
{
struct pca953x_info *info = dev_get_platdata(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
char name[32], *str;
int addr;
ulong driver_data;
int ret;
if (!info) {
dev_err(dev, "platdata not ready\n");
return -ENOMEM;
}
if (!chip) {
dev_err(dev, "i2c not ready\n");
return -ENODEV;
}
addr = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "reg", 0);
if (addr == 0)
return -ENODEV;
info->addr = addr;
driver_data = dev_get_driver_data(dev);
info->gpio_count = driver_data & PCA_GPIO_MASK;
if (info->gpio_count > MAX_BANK * BANK_SZ) {
dev_err(dev, "Max support %d pins now\n", MAX_BANK * BANK_SZ);
return -EINVAL;
}
info->chip_type = PCA_CHIP_TYPE(driver_data);
if (info->chip_type != PCA953X_TYPE) {
dev_err(dev, "Only support PCA953X chip type now.\n");
return -EINVAL;
}
info->bank_count = DIV_ROUND_UP(info->gpio_count, BANK_SZ);
ret = pca953x_read_regs(dev, PCA953X_OUTPUT, info->reg_output);
if (ret) {
dev_err(dev, "Error reading output register\n");
return ret;
}
ret = pca953x_read_regs(dev, PCA953X_DIRECTION, info->reg_direction);
if (ret) {
dev_err(dev, "Error reading direction register\n");
return ret;
}
snprintf(name, sizeof(name), "gpio@%x_", info->addr);
str = strdup(name);
if (!str)
return -ENOMEM;
uc_priv->bank_name = str;
uc_priv->gpio_count = info->gpio_count;
dev_dbg(dev, "%s is ready\n", str);
return 0;
}
#define OF_953X(__nrgpio, __int) (ulong)(__nrgpio | PCA953X_TYPE | __int)
#define OF_957X(__nrgpio, __int) (ulong)(__nrgpio | PCA957X_TYPE | __int)
static const struct udevice_id pca953x_ids[] = {
{ .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
{ .compatible = "nxp,pca9534", .data = OF_953X(8, PCA_INT), },
{ .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
{ .compatible = "nxp,pca9536", .data = OF_953X(4, 0), },
{ .compatible = "nxp,pca9537", .data = OF_953X(4, PCA_INT), },
{ .compatible = "nxp,pca9538", .data = OF_953X(8, PCA_INT), },
{ .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
{ .compatible = "nxp,pca9554", .data = OF_953X(8, PCA_INT), },
{ .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
{ .compatible = "nxp,pca9556", .data = OF_953X(8, 0), },
{ .compatible = "nxp,pca9557", .data = OF_953X(8, 0), },
{ .compatible = "nxp,pca9574", .data = OF_957X(8, PCA_INT), },
{ .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
{ .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
{ .compatible = "maxim,max7310", .data = OF_953X(8, 0), },
{ .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
{ .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
{ .compatible = "maxim,max7315", .data = OF_953X(8, PCA_INT), },
{ .compatible = "ti,pca6107", .data = OF_953X(8, PCA_INT), },
{ .compatible = "ti,tca6408", .data = OF_953X(8, PCA_INT), },
{ .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
{ .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
{ .compatible = "onsemi,pca9654", .data = OF_953X(8, PCA_INT), },
{ .compatible = "exar,xra1202", .data = OF_953X(8, 0), },
{ }
};
U_BOOT_DRIVER(pca953x) = {
.name = "pca953x",
.id = UCLASS_GPIO,
.ops = &pca953x_ops,
.probe = pca953x_probe,
.platdata_auto_alloc_size = sizeof(struct pca953x_info),
.of_match = pca953x_ids,
};
|
