drivers/clk/at91/clk-slow.c


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37

/*
 * Copyright (C) 2016 Atmel Corporation
 *               Wenyou.Yang <wenyou.yang@atmel.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <clk-uclass.h>
#include <dm/device.h>

static int at91_slow_clk_enable(struct clk *clk)
{
	return 0;
}

static ulong at91_slow_clk_get_rate(struct clk *clk)
{
	return CONFIG_SYS_AT91_SLOW_CLOCK;
}

static struct clk_ops at91_slow_clk_ops = {
	.enable = at91_slow_clk_enable,
	.get_rate = at91_slow_clk_get_rate,
};

static const struct udevice_id at91_slow_clk_match[] = {
	{ .compatible = "atmel,at91sam9x5-clk-slow" },
	{}
};

U_BOOT_DRIVER(at91_slow_clk) = {
	.name = "at91-slow-clk",
	.id = UCLASS_CLK,
	.of_match = at91_slow_clk_match,
	.ops = &at91_slow_clk_ops,
};