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/*
* (C) Copyright 2004
* Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#define SDRAM_DDR 0 /* is SDR */
/* Settings for XLB = 132 MHz */
#define SDRAM_MODE 0x00CD0000
#define SDRAM_CONTROL 0x504F0000
#define SDRAM_CONFIG1 0xD2322800
#define SDRAM_CONFIG2 0x8AD70000
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