1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
|
/*
* Copyright (C) 2011 Renesas Solutions Corp.
* Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.Iwamatsu.yj@renesas.com>
*
* board/renesas/ecovec/lowlevel_init.S
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <asm/processor.h>
#include <asm/macro.h>
#include <configs/ecovec.h>
.global lowlevel_init
.text
.align 2
lowlevel_init:
/* jump to CONFIG_ECOVEC_ROMIMAGE_ADDR if bit 1 of PVDR_A */
mov.l PVDR_A, r1
mov.l PVDR_D, r2
mov.b @r1, r0
tst r0, r2
bt 1f
mov.l JUMP_A, r1
jmp @r1
nop
1:
/* Disable watchdog */
write16 RWTCSR_A, RWTCSR_D
/* MMU Disable */
write32 MMUCR_A, MMUCR_D
/* Setup clocks */
write32 PLLCR_A, PLLCR_D
write32 FRQCRA_A, FRQCRA_D
write32 FRQCRB_A, FRQCRB_D
wait_timer TIMER_D
write32 MMSELR_A, MMSELR_D
/* Srtup BSC */
write32 CMNCR_A, CMNCR_D
write32 CS0BCR_A, CS0BCR_D
write32 CS0WCR_A, CS0WCR_D
wait_timer TIMER_D
/* Setup SDRAM */
write32 DBPDCNT0_A, DBPDCNT0_D0
write32 DBCONF_A, DBCONF_D
write32 DBTR0_A, DBTR0_D
write32 DBTR1_A, DBTR1_D
write32 DBTR2_A, DBTR2_D
write32 DBTR3_A, DBTR3_D
write32 DBKIND_A, DBKIND_D
write32 DBCKECNT_A, DBCKECNT_D
wait_timer TIMER_D
write32 DBCMDCNT_A, DBCMDCNT_D0
write32 DBMRCNT_A, DBMRCNT_D0
write32 DBMRCNT_A, DBMRCNT_D1
write32 DBMRCNT_A, DBMRCNT_D2
write32 DBMRCNT_A, DBMRCNT_D3
write32 DBCMDCNT_A, DBCMDCNT_D0
write32 DBCMDCNT_A, DBCMDCNT_D1
write32 DBCMDCNT_A, DBCMDCNT_D1
write32 DBMRCNT_A, DBMRCNT_D4
write32 DBMRCNT_A, DBMRCNT_D5
write32 DBMRCNT_A, DBMRCNT_D6
wait_timer TIMER_D
write32 DBEN_A, DBEN_D
write32 DBRFPDN1_A, DBRFPDN1_D
write32 DBRFPDN2_A, DBRFPDN2_D
write32 DBCMDCNT_A, DBCMDCNT_D0
/* Dummy read */
mov.l DUMMY_A ,r1
synco
mov.l @r1, r0
synco
mov.l SDRAM_A ,r1
synco
mov.l @r1, r0
synco
wait_timer TIMER_D
add #4, r1
synco
mov.l @r1, r0
synco
wait_timer TIMER_D
add #4, r1
synco
mov.l @r1, r0
synco
wait_timer TIMER_D
add #4, r1
synco
mov.l @r1, r0
synco
wait_timer TIMER_D
write32 DBCMDCNT_A, DBCMDCNT_D0
write32 DBCMDCNT_A, DBCMDCNT_D1
write32 DBPDCNT0_A, DBPDCNT0_D1
write32 DBRFPDN0_A, DBRFPDN0_D
wait_timer TIMER_D
write32 CCR_A, CCR_D
stc sr, r0
mov.l SR_MASK_D, r1
and r1, r0
ldc r0, sr
rts
.align 2
PVDR_A: .long PVDR
PVDR_D: .long 0x00000001
JUMP_A: .long CONFIG_ECOVEC_ROMIMAGE_ADDR
TIMER_D: .long 64
RWTCSR_A: .long RWTCSR
RWTCSR_D: .long 0x0000A507
MMUCR_A: .long MMUCR
MMUCR_D: .long 0x00000004
PLLCR_A: .long PLLCR
PLLCR_D: .long 0x00004000
FRQCRA_A: .long FRQCRA
FRQCRA_D: .long 0x8E003508
FRQCRB_A: .long FRQCRB
FRQCRB_D: .long 0x0
MMSELR_A: .long MMSELR
MMSELR_D: .long 0xA5A50000
CMNCR_A: .long CMNCR
CMNCR_D: .long 0x00000013
CS0BCR_A: .long CS0BCR
CS0BCR_D: .long 0x11110400
CS0WCR_A: .long CS0WCR
CS0WCR_D: .long 0x00000440
DBPDCNT0_A: .long DBPDCNT0
DBPDCNT0_D0: .long 0x00000181
DBPDCNT0_D1: .long 0x00000080
DBCONF_A: .long DBCONF
DBCONF_D: .long 0x015B0002
DBTR0_A: .long DBTR0
DBTR0_D: .long 0x03061502
DBTR1_A: .long DBTR1
DBTR1_D: .long 0x02020102
DBTR2_A: .long DBTR2
DBTR2_D: .long 0x01090305
DBTR3_A: .long DBTR3
DBTR3_D: .long 0x00000002
DBKIND_A: .long DBKIND
DBKIND_D: .long 0x00000005
DBCKECNT_A: .long DBCKECNT
DBCKECNT_D: .long 0x00000001
DBCMDCNT_A: .long DBCMDCNT
DBCMDCNT_D0:.long 0x2
DBCMDCNT_D1:.long 0x4
DBMRCNT_A: .long DBMRCNT
DBMRCNT_D0: .long 0x00020000
DBMRCNT_D1: .long 0x00030000
DBMRCNT_D2: .long 0x00010040
DBMRCNT_D3: .long 0x00000532
DBMRCNT_D4: .long 0x00000432
DBMRCNT_D5: .long 0x000103C0
DBMRCNT_D6: .long 0x00010040
DBEN_A: .long DBEN
DBEN_D: .long 0x01
DBRFPDN0_A: .long DBRFPDN0
DBRFPDN1_A: .long DBRFPDN1
DBRFPDN2_A: .long DBRFPDN2
DBRFPDN0_D: .long 0x00010000
DBRFPDN1_D: .long 0x00000613
DBRFPDN2_D: .long 0x238C003A
SDRAM_A: .long 0xa8000000
DUMMY_A: .long 0x0c400000
CCR_A: .long CCR
CCR_D: .long 0x0000090B
SR_MASK_D: .long 0xEFFFFF0F
|
