blob: 1ed2fd788ec17042cc5528ec2aee0d8960364104 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
|
/*
* (C) Copyright 2013-2014
* NVIDIA Corporation <www.nvidia.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm-generic/gpio.h>
#include <asm/arch/gpio.h>
#include <asm/arch/gp_padctrl.h>
#include <asm/arch/pinmux.h>
#include "pinmux-config-venice2.h"
#include <i2c.h>
/*
* Routine: pinmux_init
* Description: Do individual peripheral pinmux configs
*/
void pinmux_init(void)
{
pinmux_config_table(tegra124_pinmux_set_nontristate,
ARRAY_SIZE(tegra124_pinmux_set_nontristate));
pinmux_config_table(tegra124_pinmux_common,
ARRAY_SIZE(tegra124_pinmux_common));
pinmux_config_table(unused_pins_lowpower,
ARRAY_SIZE(unused_pins_lowpower));
/* Initialize any non-default pad configs (APB_MISC_GP regs) */
padgrp_config_table(venice2_padctrl, ARRAY_SIZE(venice2_padctrl));
}
|