blob: 08c534ca0142c891f5176355d692c90f7c4894ab (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
|
/*
* Copyright (C) 2009 Tensilica Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _XTENSA_CACHE_H
#define _XTENSA_CACHE_H
#include <asm/arch/core.h>
#define ARCH_DMA_MINALIGN XCHAL_DCACHE_LINESIZE
#ifndef __ASSEMBLY__
void __flush_dcache_all(void);
void __flush_invalidate_dcache_range(unsigned long addr, unsigned long size);
void __invalidate_dcache_all(void);
void __invalidate_dcache_range(unsigned long addr, unsigned long size);
void __invalidate_icache_all(void);
void __invalidate_icache_range(unsigned long addr, unsigned long size);
#endif
#endif /* _XTENSA_CACHE_H */
|
