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/*
* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include "skeleton.dtsi"
/ {
compatible = "qca,ar933x";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "mips,mips24Kc";
reg = <0>;
};
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
xtal: xtal {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "xtal";
};
};
pinctrl {
u-boot,dm-pre-reloc;
compatible = "qca,ar933x-pinctrl";
ranges;
#address-cells = <1>;
#size-cells = <1>;
reg = <0x18040000 0x100>;
};
ahb {
compatible = "simple-bus";
ranges;
#address-cells = <1>;
#size-cells = <1>;
apb {
compatible = "simple-bus";
ranges;
#address-cells = <1>;
#size-cells = <1>;
ehci0: ehci@1b000100 {
compatible = "generic-ehci";
reg = <0x1b000100 0x100>;
status = "disabled";
};
uart0: uart@18020000 {
compatible = "qca,ar9330-uart";
reg = <0x18020000 0x20>;
interrupts = <128 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
gmac0: eth@0x19000000 {
compatible = "qca,ag933x-mac";
reg = <0x19000000 0x200>;
phy = <&phy0>;
phy-mode = "rmii";
status = "disabled";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};
};
};
gmac1: eth@0x1a000000 {
compatible = "qca,ag933x-mac";
reg = <0x1a000000 0x200>;
phy = <&phy0>;
phy-mode = "rgmii";
status = "disabled";
};
};
spi0: spi@1f000000 {
compatible = "qca,ar7100-spi";
reg = <0x1f000000 0x10>;
interrupts = <129 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
};
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