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/* DO NOT EDIT THIS FILE
* Automatically generated by generate-def-headers.xsl
* DO NOT EDIT THIS FILE
*/
#ifndef __BFIN_DEF_ADSP_BF518_proc__
#define __BFIN_DEF_ADSP_BF518_proc__
#include "BF516_def.h"
#define EMAC_PTP_CTL 0xFFC030A0 /* PTP Block Control */
#define EMAC_PTP_IE 0xFFC030A4 /* PTP Block Interrupt Enable */
#define EMAC_PTP_ISTAT 0xFFC030A8 /* PTP Block Interrupt Status */
#define EMAC_PTP_FOFF 0xFFC030AC /* PTP Filter offset Register */
#define EMAC_PTP_FV1 0xFFC030B0 /* PTP Filter Value Register 1 */
#define EMAC_PTP_FV2 0xFFC030B4 /* PTP Filter Value Register 2 */
#define EMAC_PTP_FV3 0xFFC030B8 /* PTP Filter Value Register 3 */
#define EMAC_PTP_ADDEND 0xFFC030BC /* PTP Addend for Frequency Compensation */
#define EMAC_PTP_ACCR 0xFFC030C0 /* PTP Accumulator for Frequency Compensation */
#define EMAC_PTP_OFFSET 0xFFC030C4 /* PTP Time Offset Register */
#define EMAC_PTP_TIMELO 0xFFC030C8 /* PTP Precision Clock Time Low */
#define EMAC_PTP_TIMEHI 0xFFC030CC /* PTP Precision Clock Time High */
#define EMAC_PTP_RXSNAPLO 0xFFC030D0 /* PTP Receive Snapshot Register Low */
#define EMAC_PTP_RXSNAPHI 0xFFC030D4 /* PTP Receive Snapshot Register High */
#define EMAC_PTP_TXSNAPLO 0xFFC030D8 /* PTP Transmit Snapshot Register Low */
#define EMAC_PTP_TXSNAPHI 0xFFC030DC /* PTP Transmit Snapshot Register High */
#define EMAC_PTP_ALARMLO 0xFFC030E0 /* PTP Alarm time Low */
#define EMAC_PTP_ALARMHI 0xFFC030E4 /* PTP Alarm time High */
#define EMAC_PTP_ID_OFF 0xFFC030E8 /* PTP Capture ID offset register */
#define EMAC_PTP_ID_SNAP 0xFFC030EC /* PTP Capture ID register */
#define EMAC_PTP_PPS_STARTLO 0xFFC030F0 /* PPS Start Time Low */
#define EMAC_PTP_PPS_STARTHI 0xFFC030F4 /* PPS Start Time High */
#define EMAC_PTP_PPS_PERIOD 0xFFC030F8 /* PPS Count Register */
#endif /* __BFIN_DEF_ADSP_BF518_proc__ */
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