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/*
* (C) Copyright 2007-2011
* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
* Tom Cubie <tangliang@allwinnertech.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/gpio.h>
void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val)
{
u32 index = GPIO_CFG_INDEX(bank_offset);
u32 offset = GPIO_CFG_OFFSET(bank_offset);
clrsetbits_le32(&pio->cfg[0] + index, 0xf << offset, val << offset);
}
void sunxi_gpio_set_cfgpin(u32 pin, u32 val)
{
u32 bank = GPIO_BANK(pin);
struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
sunxi_gpio_set_cfgbank(pio, pin, val);
}
int sunxi_gpio_get_cfgbank(struct sunxi_gpio *pio, int bank_offset)
{
u32 index = GPIO_CFG_INDEX(bank_offset);
u32 offset = GPIO_CFG_OFFSET(bank_offset);
u32 cfg;
cfg = readl(&pio->cfg[0] + index);
cfg >>= offset;
return cfg & 0xf;
}
int sunxi_gpio_get_cfgpin(u32 pin)
{
u32 bank = GPIO_BANK(pin);
struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
return sunxi_gpio_get_cfgbank(pio, pin);
}
int sunxi_gpio_set_drv(u32 pin, u32 val)
{
u32 bank = GPIO_BANK(pin);
u32 index = GPIO_DRV_INDEX(pin);
u32 offset = GPIO_DRV_OFFSET(pin);
struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
clrsetbits_le32(&pio->drv[0] + index, 0x3 << offset, val << offset);
return 0;
}
int sunxi_gpio_set_pull(u32 pin, u32 val)
{
u32 bank = GPIO_BANK(pin);
u32 index = GPIO_PULL_INDEX(pin);
u32 offset = GPIO_PULL_OFFSET(pin);
struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
clrsetbits_le32(&pio->pull[0] + index, 0x3 << offset, val << offset);
return 0;
}
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