blob: f0851de122dbe63a64c5ad5989dbb51f261aa0fc (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
|
/*
* (C) Copyright 2013-2015
* NVIDIA Corporation <www.nvidia.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/* Tegra210 high-level function multiplexing */
#ifndef _TEGRA210_FUNCMUX_H_
#define _TEGRA210_FUNCMUX_H_
#include <asm/arch-tegra/funcmux.h>
/* Configs supported by the func mux */
enum {
FUNCMUX_DEFAULT = 0, /* default config */
/* UART configs */
FUNCMUX_UART1_UART1 = 0,
FUNCMUX_UART4_UART4 = 0,
};
#endif /* _TEGRA210_FUNCMUX_H_ */
|
