blob: d10583dec48c03091558d9f4a6b528995340fc8d (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
|
/*
* (C) Copyright 2011
* Marvell Semiconductor <www.marvell.com>
* Written-by: Lei Wen <leiwen@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#ifndef _PANTHEON_CONFIG_H
#define _PANTHEON_CONFIG_H
#include <asm/arch/pantheon.h>
#define CONFIG_ARM926EJS 1 /* Basic Architecture */
#define CONFIG_SYS_TCLK (14745600) /* NS16550 clk config */
#define CONFIG_SYS_HZ_CLOCK (3250000) /* Timer Freq. 3.25MHZ */
#define CONFIG_MARVELL_MFP /* Enable mvmfp driver */
#define MV_MFPR_BASE PANTHEON_MFPR_BASE
#define MV_UART_CONSOLE_BASE PANTHEON_UART1_BASE
#define CONFIG_SYS_NS16550_IER (1 << 6) /* Bit 6 in UART_IER register
represents UART Unit Enable */
/*
* I2C definition
*/
#ifdef CONFIG_CMD_I2C
#define CONFIG_I2C_MV 1
#define CONFIG_MV_I2C_REG 0xd4011000
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 0
#define CONFIG_SYS_I2C_SLAVE 0xfe
#endif
/*
* MMC definition
*/
#ifdef CONFIG_CMD_MMC
#define CONFIG_CMD_FAT 1
#define CONFIG_MMC 1
#define CONFIG_GENERIC_MMC 1
#define CONFIG_SDHCI 1
#define CONFIG_MMC_SDHCI_IO_ACCESSORS 1
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 0x1000
#define CONFIG_MMC_SDMA 1
#define CONFIG_MV_SDHCI 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_EFI_PARTITION 1
#define CONFIG_SYS_MMC_NUM 2
#define CONFIG_SYS_MMC_BASE {0xD4280000, 0xd4281000}
#endif
#endif /* _PANTHEON_CONFIG_H */
|
