blob: a98e758f031902c012e9b8f41970179a8fb38551 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
|
/*
* Device Tree Source for UniPhier PXs2 Gentil Board
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
/include/ "uniphier-pxs2.dtsi"
/ {
model = "UniPhier PXs2 Gentil Board";
compatible = "socionext,uniphier-pxs2-gentil",
"socionext,uniphier-pxs2";
memory {
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
serial0 = &serial2;
serial1 = &serial0;
serial2 = &serial1;
i2c0 = &i2c0;
i2c2 = &i2c2;
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
};
};
&serial2 {
status = "okay";
};
&i2c0 {
status = "okay";
eeprom@54 {
compatible = "st,24c64", "i2c-eeprom";
reg = <0x54>;
u-boot,i2c-offset-len = <2>;
};
};
&i2c2 {
status = "okay";
};
&emmc {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
/* for U-Boot only */
&serial2 {
u-boot,dm-pre-reloc;
};
&mio_clk {
u-boot,dm-pre-reloc;
};
&emmc {
u-boot,dm-pre-reloc;
};
&pinctrl_uart2 {
u-boot,dm-pre-reloc;
};
&pinctrl_emmc {
u-boot,dm-pre-reloc;
};
|